Problem to do LVS, DRC and Extraction in TSMC 65nm

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msdarvishi

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Hi all,

I am using TSMC 65nm and I want to do extraction Virtuoso Layout Editing. But I deal with a problem:

When I use Verify/DRC menu a window opens which uses Assura for verfication, but it needs "Switch Names". I try to choose it from "Set Switches" but this item does not open in my window and it's deactivated !!

When I try to do DRC, then LVS via Calibre/Run DRC, Run LVS menus, a window opens that asks about "Runset File" and "LVS Run Directory".

Can anybody do me a favor and help me how can I solve these priblems, how can I find the needed files and how can I do DRC, LVS, then Extraction, please?


Thanks all
Mostafa
 

Hi msdarvishi,

My TSMC kit does not support Assura, only Calibre.
DRC is strightforward : "runset" is not compulsory. In the kit installation directory, you should have a "Calibre" directory, with "drc", "lvs" and "rcx" subdirectories. Just load Calibre/drc/calibre.drc rule file for default DRC. After sucessfull DRC, you will able to save your configuration as a runset.
For LVS, you should first extract netlist (in input, check "netlist extraction"). Calibre seems not able to automatically update netlist from Cadence database (although Assura does, and it is very convenient !).

Hope this help !
 

Hi gag2000,

Thanks for your reply. Unfortunately, I cannot see the mentioned directories (DRC, LVS,...) in my installation directory. Could you please give me a routine and general direction that maybe I can find those files there?

Thanks for your help.
 

In my installation I got:
base_path/tsmc/1p5b/Calibre/drc
base_path/tsmc/1p5b/Calibre/lvs
base_path/tsmc/1p5b/Calibre/rcx

hope this help...
 

you can contact your school or company for those rule files. I can send those to you if you provide E-mail
 

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