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Since time delay is a derivative of phase shift (d phi/df), then SNR is most important to your design spec to limit  phase noise and tolerance on variances that result in jitter from Signal BW, Noise BW, nonlinearity, comparator or "slicer" &  Vref variances, prop delay, impedance mismatch reflections & changes in ambient conditions to components and supply V.  SNR is deterministic to errors.

Do the math and define what you need, before your next attempt.