Problem in the vhdl code that is produced by hdl code.

Hello,

I have written a matlab code and after that I used the hdl coder so as to convert my matlab code to vhdl code. Then I used the Quartus so as to run the vhdl code which had been produced by the hdl coder. The problem is that the waveforms in quartus showed that my output gave zero results and it did not produced the exprected results. I did some tests and I found that probably the problem was that in the matlab code there is an array as a variable in the denominator of a division and particularly it had the following form:

for i=1:m
for j=1:m
Y(i,j)=(1/[1+result(i,j)]);
S(i,j)=Y(i,j);
end
end


S=round(10000*S);

where result is an array whose elements were produced by some equations which contained in the matlab code.
Also I used the equation S=round(10000*S); so as to take integer and not continuous values in the output of my code.

Does anyone know what to do in the matlab code so as to take the expected results in the output and why I did not take results in Quartus?
Please help me. If you want more specific information about my matlab code, please tell me and I will reply you.
If it is needed I can submit my whole matlab code.
I wait for your replies. Thank you very much in advance.

I suggest reading up on digital logic design, and having a go at some VHDL yourself so you start to understand how it works.

Thank you for your reply. The problem is that I am not familiar with vhdl so I would like to avoid doing changes in the vhdl code or writing it alone from the beginning.
However, I can quote my vhdl code If you or someone else can help me.

If you dont understand VHDL, how do you expect to get it to work? is this some form of assignment for college or university - we will not do your work for you

If you don't know vhdl and don't want to change any vhdl code, then maybe use a microcontroller? Either that or read a vhdl book.

Sorry but I do not want anyone else to do my work. I only asked a specific question so as if someone knew to help me how to solve my problem.
I did not say that I cannot understand Vhdl. I only said that I am more familar with matlab so I would prefer to do any changes in my matlab code, if it is possible.
If not, of course I will try then to work in my vhdl code.

Well okay, best get coding some vhdl then. Case in point ... people are more inclined to help you if you show you have tried some real vhdl code yourself first.

Hi marinet,
Here the issue is that Matlab to HDL conversion is not easy ( mainly for synthesis ).
The division in your algorithm is a major problem. Division algorithms are in fact not straightforward to implement in digital design.
Basically you will not get division result in one clock cycle, and hence the problem.
Thats why everyone insists you to learn Digital / HDL design.

I dont have experience with your problem, but i would like to give a suggestion.
Make your matlab code modular, with division in a separate block. Replace it with IP core. This option is also a bit difficult.
Or if you have an option, go with uC implementation as mrflibble suggested.