slamnas
Newbie level 6
Hi, I'm new on this site is the first I filed a problem.
I am designing a regulated charge pump 'Dickson topology' (Specification: power supply = 3.3 V, 5 V regulated output, Cload=10pF) I used two stages (2 capacitors 1pF pumping with a clock frequency is betwin 500khz and 1MHz . I use the simulator spectreS. The technology is TSMC035.
I have a problem in the level regulation. voltage drop when using a voltage divider with two resistors in values depend on the feedback voltage. Comparator 2-stage OTA with hysterisis works well alone.
files attached below shows the result of pumping without regulation and with control
I am designing a regulated charge pump 'Dickson topology' (Specification: power supply = 3.3 V, 5 V regulated output, Cload=10pF) I used two stages (2 capacitors 1pF pumping with a clock frequency is betwin 500khz and 1MHz . I use the simulator spectreS. The technology is TSMC035.
I have a problem in the level regulation. voltage drop when using a voltage divider with two resistors in values depend on the feedback voltage. Comparator 2-stage OTA with hysterisis works well alone.
files attached below shows the result of pumping without regulation and with control