[SOLVED] problem in negative fractional representation

hi,
i had designed a divider which perform -ve and +ve division . but i had a problem in this one. in this how can i represent -ve fraction .
in my design i am storing quotient to one register and fraction to another register so if the out put is -.5

( suppose 8 bit with 4 bit for fraction ) then 1111.1000
so it is exactly like -1.5.

so my doubt is how -1.125 , -.125 really represented in a fpga?

is it possible to take 2'complement of fraction(because it is 2^-1,2^-2...)??

what i do is if the result is negative then keeping the fraction as itself and taking the 2's complement of the quotient.

i dont have any idea what to do plz help me

thanks and regards

What is the source to be measured,
for example if you measure between -2.5V +2.5V,
just simply add it extra 2.5V with an opamp circuit,
and then it will turn into 0V-5V,
now you may only work with positive voltage,
and as you said if you represent 4 bit fraction and 4 bit integer
it means 1111.1111 is the biggest value
but think like 1111.0000 is the biggest value
so the biggest value is 15 in the decimal notation,
this is the 5V
if the value is smaller than 8 it means voltage below 2.5V
so this is negative voltage,
and you just need to control if it is bigger or smaller than 8 for this example,
if it is smaller you just say it is negative
when you are displaying it,
it is also easy to check negative or positive
because decimal 8 is 1000 in binary
smaller than decimal 8 is always 0xxx
if the MSB is zero measured value is negative.

thanks for your replay..
but i am talking about vlsi design in fpga

Sorry i misunderstood your problem.
If the problem is just
how i can represent negative floating point in fpga
you just need to use MSB as a sign bit,
exsisting floating point represantation systems generally use this method.