Ghazale
Newbie level 2
hi
i am trying to write a alu verilog code which has two parts.logic and arithmetic.i have written each part and they work correctly but i get errors using them.i want the logicresult for mode=0& arithmeticresult for mode=1.i get this error"Instantiation is not allowed in sequential area except checker instantiation" can anyone help me?
thanks a lot ~_~
module aludesign(
input mode,
input carryin,
input [3:0] inputA,
input [3:0] inputB,
input [1:0] select,
output carryout,
output reg [3:0] result,
wire logicresult,
wire arithmeticresult
);
always@(*)
begin
arithmetic instanceOfArithmetic (inputA,inputB,select,carryin,arithmeticresult,carryout);
logics instanceOfLogic(inputA,inputB,select,logicresult);
case(mode)
1'b0:result = logicresult ;
1'b1:result = arithmeticresult ;
endcase
end
endmodule
i am trying to write a alu verilog code which has two parts.logic and arithmetic.i have written each part and they work correctly but i get errors using them.i want the logicresult for mode=0& arithmeticresult for mode=1.i get this error"Instantiation is not allowed in sequential area except checker instantiation" can anyone help me?
thanks a lot ~_~
module aludesign(
input mode,
input carryin,
input [3:0] inputA,
input [3:0] inputB,
input [1:0] select,
output carryout,
output reg [3:0] result,
wire logicresult,
wire arithmeticresult
);
always@(*)
begin
arithmetic instanceOfArithmetic (inputA,inputB,select,carryin,arithmeticresult,carryout);
logics instanceOfLogic(inputA,inputB,select,logicresult);
case(mode)
1'b0:result = logicresult ;
1'b1:result = arithmeticresult ;
endcase
end
endmodule