Jayakumar.azetech
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Hi
I am using the ARM LPC2148 --Timer, In this I am facing some issues as when ever MRO and MR1 matches it will triggers TCR and also i have enabled all the interrupt on match registers its working good.Whenever it matches the PR(Prescalar Reg) set and PC(Prescalar Counter) will enable @ the same time and TC should count the values. My problem is PC enable and disabled but TC doesn't get value (TC=0 all time) but in my case TC should increments its count.:?:
I want to enable all my match registers, and to order my value in match register.
for example,
User_Counter_Value(1);
User_Counter_Value(2000);
User_Counter_Value(50);
User_Counter_Value(1000);
this should hold the match register values as MRO=1, MR1=50, MR2=1000, MR3=2000. Not MRO=1, MR1=2000, MR2=50, MR3=1000
I am using the ARM LPC2148 --Timer, In this I am facing some issues as when ever MRO and MR1 matches it will triggers TCR and also i have enabled all the interrupt on match registers its working good.Whenever it matches the PR(Prescalar Reg) set and PC(Prescalar Counter) will enable @ the same time and TC should count the values. My problem is PC enable and disabled but TC doesn't get value (TC=0 all time) but in my case TC should increments its count.:?:
I want to enable all my match registers, and to order my value in match register.
for example,
User_Counter_Value(1);
User_Counter_Value(2000);
User_Counter_Value(50);
User_Counter_Value(1000);
this should hold the match register values as MRO=1, MR1=50, MR2=1000, MR3=2000. Not MRO=1, MR1=2000, MR2=50, MR3=1000