Problem about differential delay buffer in Ring VCO

[flyinspace]

delay buffers for vco

Hello everyone,

I met a problem about the differential delay buffer, which uses for Ring VCO. The structure of the buffer is just as the figure.

From the paper--R.J. Betancourt-Zamora, T.H. Lee, “CMOS VCOs for Frequency Synthesis in Wireless Biotelemetry”, Int’l Symp. Low Power Electronics & Design, pp. 91-93, August 1998.--I know the buffer has good phase noise performance in contrast with other's load structures. Unfortunately, I can't comprehend the trick of the cross-coupled load.

Who can explain the function of the two cross-coupled load pmos transistors compared with none of them?

Thanks in advance!

 

[flyinspace]

Re: Delay buffer in Ring VCO

BTW, the paper is attached.

The interpretation in this paper is "For the proposed cross-coupled load (Figure 5c) design of VCO3, we started with a symmetric load stage with no cross-coupling and swept the width of the cross-coupling devices while maintaining the total width (capacitance) of the loads constant. The maximum symmetry of the output waveform was observed when the widths of M1 and M2 were equal to half the width of M3."

It just mentioned that the cross-coupled load is useful for the symmetry, But why? (I have known the symmetry property contributes to the lower phase noise according to Hajimiri's Phase Noise time variable model.)

Thanks a lot!

 

[amitbhaiji]

Re: Delay buffer in Ring VCO

hi i think that cross couple pair are provided to get teh positive feedback...which will reduce the rise and fall time of the wavform and hence reduce the rms value of ISF which in turn reduce the flicker noise upconcersion...and hence teh close in phase noise will reduce...

am i clear to you.
Amit

 

[flyinspace]

Re: Delay buffer in Ring VCO

hi i think that cross couple pair are provided to get teh positive feedback...which will reduce the rise and fall time of the wavform and hence reduce the rms value of ISF which in turn reduce the flicker noise upconcersion...and hence teh close in phase noise will reduce...

am i clear to you.
Amit

Hi Amit,
Thanks for your explanation!
I think you are right. BTW, in order to reduce the flicker noise upconversion, it should be reduce the DC value of ISF not the rms value. Right?
Another problem--do you know how to caculate the ISF of output waveform by SPICE?
Thanks & Best Regards

 

[raymond_luo2003]

Delay buffer in Ring VCO

Hi, rightnow Cadence have the tool SpectreRF which is capable of PhaseNoise simulation by PSS and Pnoise feature. The theroy from Hajimiri is nice enough but tedeious for designers to mannual or by Hspice to caculate the ISF function. Definetely the theroy from Hajimiri give you some insight on circuit, but for the real circuit simulation you have to rely on the SpectreRF.
I have the experience on that.

Raymond

 

[fehler]

Re: Delay buffer in Ring VCO

I am not sure whether any body has fabed and tested this circuit.
For me, I have built all the 3 kinds of vco cell in beta's paper,
but I am not sure there is a difference. In fact, I think Meneatis' or
H C Yang's cell is best.

fehler

 

[STOIKOV]

Re: Delay buffer in Ring VCO

I'm interested in simulating and building a differential ring oscillator.
Does someone know how to calculate the size of each MOS of the cells used in Betancourt and Lee's paper, what region have to operate ?
Do you suggest a delay cell in particular ?

Thks.