I didn't say that it doesn't work
This is what OpenAI says
how does simple reliable a DSB-SC AM demodulator work with a pll
A DSB-SC AM (Double Sideband Suppressed Carrier Amplitude Modulation) demodulator with a PLL (Phase-Locked Loop) is a common method used for demodulating a DSB-SC AM signal. The demodulation process involves the following steps:
- Input signal: The DSB-SC AM signal is the input signal to the demodulator.
- Bandpass filter: The input signal is first passed through a bandpass filter that allows only the desired frequency range of the modulated signal to pass through, while rejecting unwanted frequencies.
- Mixer: The filtered signal is then mixed with a local oscillator signal that is set to the carrier frequency of the modulated signal. The output of the mixer is a baseband signal that contains the original modulating information.
- Phase detector: The output of the mixer is then fed into a phase detector, which compares the phase of the output signal with that of a reference signal from the local oscillator. The phase detector output is a DC voltage that is proportional to the phase difference between the two signals.
- Low-pass filter: The output of the phase detector is passed through a low-pass filter that removes the high-frequency components and leaves only the DC voltage.
- Voltage-controlled oscillator (VCO): The DC voltage from the low-pass filter is then used to control the frequency of a voltage-controlled oscillator (VCO). The VCO output is fed back to the mixer as the local oscillator signal.
- Output signal: The demodulated signal is obtained at the output of the low-pass filter.
The PLL is used to lock the phase of the local oscillator to that of the carrier signal, which helps to maintain the correct phase relationship between the modulated signal and the local oscillator. This ensures that the mixer produces an output signal that contains only the baseband information. The PLL also helps to reduce the effect of noise and interference on the demodulated signal, making it a reliable demodulation method.
I am afraid that one PLL whose VCO mid-frequency is made to be equal to the frequency of the suppressed carrier doesn't work
Why?
At every zero crossing of the modulating signal, the phase of the suppressed carrier shifts 180 degrees. And this reverses the direction of the phase comparator output.
To avoid this, doubling the VCO mid-frequency and adding a duty shaper to change the duty cycle of the signal squarewave (at the signal input of the phase comparator) from 50% to 25%, the phase comparator won't be affected by the phase reversal of the suppressed carrier.
For instance, after 3 months of failed designs at the university lab, I don't know how I had the idea, just a couple of days before leaving the lab, to use a PLL and set its mid-frequency at 910 KHz instead of 455 KHz which is of the suppressed carrier (AM IF). And I did the test though my study showed me clearly that it couldn't work... another failure.
To my big surprise, it worked (much like it happened to Archimedes
). First, I thought that the musical audio input (from a tape recorder) was connected, by mistake, to the output speaker. But when I varied, a little, the frequency of the carrier, the sound was off.
Truth be said, on that day, I had no clue about how it was possible for this simple PLL to work (Costas Loop uses two PLLs in quadrature). Only when I returned home, I had enough time to examine every node of it. The cause was simply the natural imperfection of the high-gain comparator (as LM339, to convert the analogue DSB-SC signal to squarewave). The duty cycle of the generated squarewave was slightly different from 50%. This small difference was enough to let the PLL locks though in a very narrow band.
A further study let me know that the widest lock range occurs if the duty cycle at the output of the high-gain duty shaper is made to be 25% (or 75%).
Although, on the actual schematic, there are two 25% duty shapers, the demodulators in my private links worked fine with one only.