[Prime Time] Randomness of power consumption

[jocelyn97]

Hello, Everybody!

I'm measuring the power consumption of an algorithm. I have a question.

When we measure power consumption with FPGA with the same test vector，the measurements will vary slightly due to noise.

But why does the same test vector get the exact same result when using PT ？

And how can I simulate this kind of randomness similar to the actual situation?

Thank you so much!

 

[rca]

did you run the PT on FPGA netlist?

 

[jocelyn97]

did you run the PT on FPGA netlist?

sorry, no. I run the PT in CentOs

 

[rca]

sorry what are you comparing? FPGA real power measurement can only be compare with the FPGA netlist or you will not compare apple-to-apple, no?

PT means PrimeTime, right ? or?

Power analysis tool inputs:
- library with power number
- netlist
- activity vector
Then the tool can compute the power consumption.

but to be a correct comparison, that should be the netlist of the implementation inside your FPGA + the library model of the FPGA it self.

 

[jocelyn97]

sorry what are you comparing? FPGA real power measurement can only be compare with the FPGA netlist or you will not compare apple-to-apple, no?

PT means PrimeTime, right ? or?

Power analysis tool inputs:
- library with power number
- netlist
- activity vector
Then the tool can compute the power consumption.

but to be a correct comparison, that should be the netlist of the implementation inside your FPGA + the library model of the FPGA it self.

Yes, PT means PrimeTime.
I mean When we actually measure the power consumption with the device, there is a slight variation due to noise even though the test vector is the same.
We won't have this variation with PT, right?
Thank you very much for your reply.

 

[rca]

slight variation means ?

 

[jocelyn97]

slight variation means ?

I'm so sorry, I don't know how to express myself exactly.
Maybe I just need to be sure that the results measured by PT are the same if the test vectors are the same.

 

[KlausST]

Hi,

Deviation in the ppm range is meaningless.
Deviation on the low percent .... should not matter, too.
If the deviation is a factor of 2 then something is wrong.

We don´t know how much the deviation is. But you know. So please tell us. Give numbers.

Klaus

 

[dick_freebird]

Many simulators / analyzes do not consider device noise attributes. For example tran, DC, ac .... I'd imagine this is even extra true for digital abstractions.

In any case device noise energy is far below device switching energy so doubt that noise, short of levels impacting functionality, is not significant to the power roll-up.

 

[oratie]

As I understood you are comapre real FPGA meaurements with PT netlist measurements. Am I right?

If you measure power consumption on the real FPGA - the measurements are vary (even with the same input vectors) - it's expected. The temperature are vary, the timing slightly vary, the voltage drop, etc ...

When you measure power in PT- the temperature is stable, the timing is stable - nothing vary. The PT produce repeatable results, until you did not change any of inputs : vectors, corners, voltage, etc...

So, if you want to compare, you should compare results of FPGA netlist in PT with ASIC netslist in PT OR real FPGA measurements with real ASIC measurements.