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Powersupply monitor using three comparators

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analog_fever

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I am trying to solve a problem in the Sergio Franco book.

The problem is to design a power supply monitor such that the output is a 0 (or 1) as long as the power supply stays within +/- 5% of a value. We need to use 3 comparators, a voltage reference, and resistors.

I tried thinking about this for some time, but could not get an architecture using 3 comparators.
 

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