power supply & substrate noise

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flyinspace

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Hi everyone,

Who know the scale of power supply & substrate noise in mixed signal IC? Assume the power supply is 5V and the circuit is MCU. I plan to simulate the CMRR capability of differential circuit, hence add some noise sources is necessary, I think.

I have heard that power supply & substrate noise belongs low frequency noise. I want to know the range of low frequency noise, and is 10Hz~1MHz resonable? How about the amplitude of the noise, maybe 50mv?

If I know the frequency range & amplitude of power supply noise, then I can generate the noise signal by Matlab, which can be as a PWL noise source added to the circuit. Finally, running transient analysis can observe the CMRR capability.

Thanks & best regards,
flyinspace
 

I think substrate noise mainly include high-frequency noise (especially due to switching noise generated by digital circuits). High-frequency noise travel through the substrate and coupled to analog circuit through capacitances.
 

can we simulate the substrate noise with any post layput package?
 

does the switching of the pfd in a pll after lock also cause substrate noise?

regards
amarnath
 

In order to model your noise from power supply or substrate, u should include those inductance and capacitance of bonding wire, and the system clock frequency, and the estimated load of your total power. Then using dV=L*di/dt, di=C*dv/dt, to model ur "lumped" noise.
The noise frequency will spread in a large frequency range if your dv/dt is large.
that's my opinion.
 

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