Power Planning issues in physical design

What actually happens in power planning?
What are the library files invilved in it?
How to optimise it?
How are power rings,straps,trunks are designed?
Howvdd & vss lines are laid?
What are the issues encountered while placing i/o pads?

hi pavithra..

There are two types of power planning and management. They are core cell power management and I/O cell power management. In former one VDD and VSS power rings are formed around the core and macro.In the later one, power rings are formed for I/O cells and trunks are constructed between core power ring and power pads.

In addition to this straps and trunks are created for macros as per the power requirement...

powerplaning is done during floor plan..In power_route.tcl file we used to set offset values for rings around the core and for vertical and horizontal straps....

I/O cell libraries contain I/O and Power/Ground pad cell libraries. It also contain IP libraries for reusable IP like RAMs, ROMs and other pre-designed, standard, complex blocks.

pavithra226 said:

What actually happens in power planning?
What are the library files invilved in it?
How to optimise it?
How are power rings,straps,trunks are designed?
Howvdd & vss lines are laid?
What are the issues encountered while placing i/o pads?

Click to expand...

Hi.pavitra
our main aim of power planning is to ensure all the cells in design are able to get sufficient power for proper functioning of our design.
we require no other special libraries for it.we have to load the floorplan completed design for doing powerplanning.
Placing I/O pads is done based on loaded I/O assignment file during design importing.
If u still have any doubts u can bring it to me without no hesitation