Power over coax schematic review

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newbie_hs

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I am using DS90UB925Q-Q1 5 serializer in my board and output of this board is connected to DS90UB926Q deserializer .The block diagram is given below.

As per theory I can send power along with the data lines(Power-over-Coax Design)

You can see my PoC network in the bottom of the image.

My intention is to send 12V,1A along with this data(DOUT+ and DOUT-).

This 12V ,1A is received at Deserializer side along with the data and is used to power other devices present in the deserializer section.

I gave this schematic to TI AE team for review.The response received is that TI did not tested PoC on thsese devices and they told theoretically it will work.

You can do at your own risk. I decided to take that risk.

Could you please review my PoC network.

Please let me know your comments.
 

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DS90UB92xx have internal termination. There should be no R790.
Check intended current load and saturation characteristi of "1000 ohm" ferrite bead. I'm not aware of a 1000R bead with useful current rating. See e.g. biased impedance curve of Fair Rite 1206 600R 1A ferrite bead, it clarifies that 1A rating is a pure DC figure. Ferrite beads of other vendors have similar behaviour, rarely documented, unfortunately.

 

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    newbie_hs

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Hi,

additionally...
you say 12V, 1A .. we see you want to send via PoC+
but there needs to be a return path.

I guess via PoC- ... but there are two 49.9 Ohms resistors in series.. I can´t see how it is able to work.

Klaus
 

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I expect a separate ground return, e.g. through differential pair shield. If it's not present, you need an additional POC- path with chokes similar to POC+.
 

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Hi,

I´m really confused.
* Is it coax .. like he wrote (single coax or two coax)
* is it diferential pair like in the schematic
* or maybe twin-ax

(if two coax, then I´d rather rely on feeding power over the shields. I guess they are more low ohmic than the center conductor)

Klaus
 

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The TI schematic suggests "STP" (shielded twisted pair), as expectable for GBit data link. There will be usually a grounded shield.
 

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    newbie_hs

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Thank you very much I will remove R790.

My maximum load current is 1A only.

The ferrite beads P/N is MPZ2012S102AT000(1 kOhms @ 100 MHz 1 Power Line Ferrite Bead 0805 (2012 Metric) 1.5A 150mOhm).



The two inductors are SRU2016-4R7Y(4.7 µH Shielded Drum Core, Wirewound Inductor 1.15 A 215mOhm Max Nonstandard) and

MSS7341T-104MLD(100 µH Shielded Drum Core Inductor 1.15 A 310mOhm Max Nonstandard)

Regarding return current, that will be flowing via the cable shield.

I am planning to use this connector,HSD-04C-S-PT-SG-C1-TR(HSD®, Fakra, Quadraxial Connector Plug, Male Pin 100 Ohms Through Hole Solder)
 

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Besides discussed problem of saturation with DC bias (as expected, your manufacturer doesn't specify it), the impedance in the frequency range of interest (> 500 MHz) is very low.
 

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May I know can I connect multiple ferrite beads in series to improve the impedance.

As per my self study goal of the PoC filter is to make the impedance of the PoC delivery network much higher than the impedance of the 50-ohm transmission line so that the high speed signal edges don't "see" the PoC network.
 

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I'd rather think of something like Coilcraft 4310LC bias choke

4310LC Series Wideband Bias Chokes | Coilcraft

Coilcraft 4310LC Series wideband bias chokes provide flat bandwidth with high impedance to 6 GHz. They offer low DCR and excellent current handling and are ideal for use in high-current bias Tee applications.
www.coilcraft.com

 

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    newbie_hs

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TI POE doc says " 3.1.1 ...The current that this circuit can handle is limited by the ferrite beads at 250 mA."
- 4 times as many FB's in parallel ?? hmm
research if this has been done before

I would start with design specs: e.g. then work out what is needed for each part.

  1. DC port s21 = -12dB min over passband design target 15 dB
  2. Do above for V+, V- and also Vcm effects on CMRR
  3. Convert DC port s21 to Z(f) for 50 ohm load.
  4. Compute all L's, Rs Rp within reasonable R/L ratios like 100 to 300 (guestimate), compare FB's for R, R/L, I max over spectrum in spreadsheet
  5. Ensure 12V power sequence is transient protected on low voltage sides.
  6. For 12W PoE choose 1% losses max for now
  7. Environmental tolerances: for Temp, Humidity, ESD protection, EMC levels for ingress & egress (CMRR), V+ tolerances etc, vibration ? 5g 1mm (for microphonics)

other:
  • CM choke specs for reducing interference over spectrum and current. (bifilar ferrite SMD coils?) from s22 unbalun error +/- PoE
  • Eye Pattern margins: Industry Stds.
 
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use the tools with the best libraries for these parts. LTspice has FB's and L's but limited compared to others.

I suggest you use 48V ~ 250 mA instead of 12V 1A with soft start.
I think CATV uses 48V this for PoC for >=1 Gbps data streams on coax.
 
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