Power-on-reset signal on the FPGAdevelopment board

[engr_joni_ee]

Hi, I have attached two pages of a schematic in which the voltages SYS_1V0, SYS_1V8 and SYS_2V5 are generated by switching regulator MAX15053 and LDO linear regulator MAX15027.

There are power-on-reset (POR) signals SYS_1V0_POR_B, SYS_1V8_POR_B and SYS_2V5_POR_B which are connected to the enable (EN) of switching regulator MAX15053 and LDO linear regulator MAX15027 which is to enable the output.

I am wondering that these POR signals are generated by the MAX16050 which is "Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability" that actually needs the power SYS_1V0, SYS_1V8 and SYS_2V5 to generate POR. I am bit confused here. How MAX16050 can generate the POR signals without SYS_1V0, SYS_1V8 and SYS_2V5 which actually needs POR at the enable pin of switching regulator MAX15053 and LDO linear regulator MAX15027.

 

[FvM]

Read datasheet details to understand how the sequencing circuit works.

The resulting sequence is so
3.3V up and SHDN released -> enable 1.0 V switcher
1.0V up -> enable 1.8 V switcher
1.8V up -> enable 2.5 V switcher
2.5V up -> release SYSCTRL_POR

 

[engr_joni_ee]

I checked in the schematic from the first post that SEQ1, SEQ2, SEQ3 are un-connected.

In the datasheet, there is a sequencing table on page 16 which does not have anything option to leave them un-connected than which sequence is enabled ? What is the difference between High-Z and High logic ?

 

[FvM]

Sure you are reading a recent datasheet?

Or don't you understand that High-Z means open circuit respectively unconnected?

 

[engr_joni_ee]

Hi, if the meaning of High-Z is un-connected then it is clear to me. Thanks for reply.

 

[engr_joni_ee]

One more question regarding MAX16050 about the pins DISC1, DISC2 and DISC3 which are connected to the supply voltages in the schematic on the first page but the datasheet says they are discharge pulldown. I don't understand how in the schematic in the first post they have connected DISC1, DISC2 and DISC3 to the supply voltages.

 

[KlausST]

Hi,

Hi, if the meaning of High-Z is un-connected then it is clear to me. Thanks for reply.

HIGH-Z means: high impedance. Not driven HIGH, not driven LOW, not driven at all.

HIGH-Z and "unconnected" is not ncessarily the same.

* there are outputs, they are not HIGH-Z when unconnected
* there are GPIOs. Means they can be temporarily: inputs, outputs, floating, pulled HIGH or pulled LOW.
* there are GPIOs with BUS-KEEPER. Means they have a weak internal circuit to keep the last logic state.
* There are inputs with internal pull up or pull down.
Then - even unconnected - the input is not HIGH-Z. It is weakly pulled HIGH or LOW.
This way it easily can be overdriven externally.

Klaus

 

[engr_joni_ee]

Thanks for reply. If I found in the datasheet for any pin requirement is High Z then it should not be driven low and should not be driven high but leaving it un-connected will full fill the requirement, right ?

I am still wondering about DISC1, DISC2 and DISC3 pins, see post number above please.

 

[FvM]

DISCx pins do what the name suggests: discharge a supply node when the respective channel is turned off. What's unclear with the datasheet description?

 

[engr_joni_ee]

DISCx pins do what the name suggests: discharge a supply node when the respective channel is turned off. What's unclear with the datasheet description?

These pins have internal pull down resistors according to datasheet, right ? I am wondering why they have they connected DISC1, DISC2 and DISC3 to the supply voltages in the schematic in post 1. I am not getting the current path when they discharge and when not discharge.