Power MOSFET and normal MOSFET

[RobertoShao]

difference between power mosfet and normal mosfet

i do not know very clearly about these two kinds of MOSFET

Is power mosfet the kind of large size normal mosfet?

or power mosfet uses different process

if we use tsmc0.25um 2.5V/5V, and the working current is nearly 2A

can we just using the transistor only by large width mosfet, maybe 20mm

thank you!

 

[EleApollo]

Power MOSFET is the different technology to the normal one. It has not only a large size and the thickness of the oxide and so on is diiferet

 

[tlihu]

Surely process is an issue. However, if you want to use logic process to implement power mosfet, model is the first thing to check. Usually model parameters were based upon much smaller sized mosfet. So, ask TSMC before you go.

 

[cetc1525]

power mos has the difference from nomal.it's back is the drain.it's current flow straight.

 

[sunking]

It depond on you requirement.
In fact, you can use large normal mosfet as power mosfet, such as 2A current. Some device use it even 4A.but the area is large.

 

[huanchou]

The power MOSFET is used to high voltage and current application,
its size is larger than the normal one, and design rule is somewhat different from normal one.

 

[selvaraja]

Hi
The power MOSFET is used for high voltage and current application, the oxide thickness is different compare to standard submicron CMOS process. Power mosfet not meant for high frequency application

 

[RobertoShao]

power mos has the difference from nomal.it's back is the drain.it's current flow straight.

would you please give me some detail or some papers i can see.

thank you

 

[Colbhaidh]

Try
h**p://www.irf.com/technical-info/papers.html

Typically high voltage transistors are discrete as they do not integrate well.
The highest voltage TSMC or UMC or Chartered will be about 40V tops (or +/- 20V) and these will be lateral LDMOS devices.

 

[omsi]

the very basic difference between two is that for power mosfet the gate oxide is thick and has high threshold voltage and can withstand high input voltage.
where as for normal mosfet,the gate oxide is thin and cannot withstand high voltage and gate oxide damages when high voltage is applied.

 

[cicer]

it is different structure between Power MOSFET and normal MOSFET, power MOSFET, for example LDMOS, VDMOS etc.
I think that the pcm file should give your the structure.

 

[Sajjadkhan]

I have some basic question and hoping to be answered.
I going to use Mosfet "130NS04".
View attachment STB130NS04ZB.pdf
The Header of the datasheets says:
-----------------------------------------------------------------
N-CHANNEL CLAMPED - 7 mΩ - 80A TO-220/D²PAK/TO-247
FULLY PROTECTED MESH OVERLAY™ MOSFET
-----------------------------------------------------------------
It is not written that its a power mosfet but as the current "Id" is large so i m assuming it a Power Mosfet. The symbol says that its an Enhancement type Mosfet. The important thing i wana know is....Does the current equation of simple Mosfet still applies to power mosfet or this mosfet? if not, what is the current equation then?
Also plz kindly explain that whats does MESH OVERLAY and CLAMPED means in this scenario,thanks

 

[erikl]

It is not written that its a power mosfet but as the current "Id" is large so i m assuming it a Power Mosfet.

Right!

Does the current equation of simple Mosfet still applies to power mosfet or this mosfet?

Yes. Use the strong inversion square-law relationship. Or the data sheet curves :-D .

... what does MESH OVERLAY and CLAMPED mean in this scenario

See here for MESH OVERLAY. CLAMPED means the GS, GD & DS overvoltage protection by integrated Z-diodes (s. Fig. 2 of the data sheet).

 

[prcken]

power MOS usually means the LDMOS in BCD process which can tolerate high voltage, HV MOSFETs are equipped with thick gate oxides and lowly doped drain/source implants to increase the voltage tolerance of the devices. This allows driving the maximum operating voltages to the limit of the process.

 

[Teddy]

For your 025um - yes you can make it with maximum VDD 5-6V. Then it depends what aplication you want to use it for - if you drive inductive load you will experience large inductive kickback which might destroy your device. ALso the voltage spikes caused by it might be larger than breakdown voltages.
So yes you can do it but nobody will tell you how - it is guarded secret.....

 

[tantanmoy12]

I am going to join a research group of Noise and Reliabilty in University of Texas at Arlington. I will start my work with LDMOS. Please suggest me some good study material, books on LDMOS basics.

 

[erikl]

Please suggest me some good study material, books on LDMOS basics.

Here's a paper on LDMOS: View attachment KevinBuckPaper.pdf