power loss converted in heat

[Winsu]

Hi All,

I am trying to find out if my boost converter will get too hot. I am sure the conduction losses in the power switch are converted in heat dissipation, so I have to include this to calculate maximum Tj. I am not sure if switching losses will convert in heat , so I don't know if I have to also include them to calculate Tj.

The chip that I am using is the NCP3066, ideally I would like to use the SOIC package so the Rja is 180°C/W.

If I have to include the switching losses of the power switch to calculate the Tj that means that the IC is getting too hot.... Could anyone explain how to do this, as I am not sure if I am doing right?, Thanks

 

[KlausST]

Hi,

Every loss usually is converted into heat.

Klaus

 

[Winsu]

Thanks.

I guess to calculate the Tj I would have to do the following:

Conduction loss on switch power + switching loss on switch power = 0.36w + 0.48w = 0.84w

Tj = Ta + Rja * Pd = 25°C + 180°C/w (using the soic packcage) * 0.84w = 175.42°C.

I would say that the IC is getting too hot. Is this calculation right?

 

[d123]

Hi,

Is the switch internal to the IC? Couldn't say if the calculation is correct right now, but 175°C is 25°C higher than the 150°C stipulated in the datasheet snippet.

FWIW, AN1484, aka snva168e, 'Designing a SEPIC Converter' application note, PD Q1 (MOSFET PD formula) points out that it includes both conduction and switching losses.

Maybe all useless info., just trying to help.

 

[Winsu]

Hi D123,

Yes the switch is internal. It has a internal BJT and it doesn't need external switch...... I am still not sure if I could use it. The datasheet states 1.5A maximum. I am driving an LED at 600mA ( VF = 33.15V). I chose this chip because I though it wasn't going to have heat problems ( apart because of simplicity)....

 

[FvM]

You didn't tell how you calculated the loss values, neither what's the converter input voltage. Getting 20 W output from this low cost + low performance switcher is probably expecting too much.

 

[Winsu]

I used the design tool from onsemi, the input voltage is 24V:

Technical Documentation - Design | onsemi

www.onsemi.com

It is true teh Rja of 180°C for SOIC package is just massive....

 

[d123]

Hi Winsu,

It is true teh Rja of 180°C for SOIC package is just massive....

TPS73801 LDO datasheet shows how to calculate PD in last section. It's a 1A SOT-223 device. If you ever read it, it almost seems to deliberately/thought-provokingly end abruptly at the result of Tj +Tamb is 121°C for only 500mA out and Vin - Vout only 3V, Tamb 50°C. It's almost funny how it chooses to end, like a cliffhanger... It really made me see how top of datasheet specs in normal, not maximum, operating section of e.g. 1A out, x Watts PD are extremely relative and can be limiting in one's goals.

--- Updated Oct 25, 2020 ---

Hi again,

Further to the above - and bearing in mind I'm a just a 'learn-as-you-go' hobbyist, so everything I try to study or make is always about lengthy learning curves and getting something 'wrong' first time around (... and if I were honest: second and third and nth time around...) for me - when I did some low voltage, low current SEPIC calculations, the choice of transistor was several iterations (...) as a few whose various power specs seemed matched to and/or far greater to needs went over PD/Tj max.

What's your boost converter going to be enclosed in? Could you add a heatsink, or a (little or large) fan for forced cooling?

 

[FvM]

I wonder if the Onsemi design tool is calculating correctly. Curiously the displayed switching losses are increasing with decreasing switching frequency, although duty cycle and peak current remain constant.

 

[Winsu]

Hi Winsu,



TPS73801 LDO datasheet shows how to calculate PD in last section. It's a 1A SOT-223 device. If you ever read it, it almost seems to deliberately/thought-provokingly end abruptly at the result of Tj +Tamb is 121°C for only 500mA out and Vin - Vout only 3V, Tamb 50°C. It's almost funny how it chooses to end, like a cliffhanger... It really made me see how top of datasheet specs in normal, not maximum, operating section of e.g. 1A out, x Watts PD are extremely relative and can be limiting in one's goals.

--- Updated Oct 25, 2020 ---

Hi again,

Further to the above - and bearing in mind I'm a just a 'learn-as-you-go' hobbyist, so everything I try to study or make is always about lengthy learning curves and getting something 'wrong' first time around (... and if I were honest: second and third and nth time around...) for me - when I did some low voltage, low current SEPIC calculations, the choice of transistor was several iterations (...) as a few whose various power specs seemed matched to and/or far greater to needs went over PD/Tj max.

What's your boost converter going to be enclosed in? Could you add a heatsink, or a (little or large) fan for forced cooling?

C

Hi d123,

It will be in a still air box and I don't think I can put a fan. I could put a heat sink on top of the driver for dissipation but it should be able to work at 55°C ambient, so I think it needs to run cooler but itself. I will have a look to the datashet to have pointed out shortly.

It is useful to calculate heat dissipation in linear constant voltage. What I have is a switching regulator where there are also losses from switching. Thanks for your help.

--- Updated Oct 25, 2020 ---

I wonder if the Onsemi design tool is calculating correctly. Curiously the displayed switching losses are increasing with decreasing switching frequency, although duty cycle and peak current remain constant.

Hi FvM,

I also though about that. My understanding always was. Low frequency means, more efficiency, less heat and bigger components, high frequency means less efficiency, more heat and smaller component. In this case is the contrary.

How could I calculate that by hand?. I know how to calculate conduction losses by hand, but switching losses is much more complicated and I actually dont know how to do it....


This is an explanation of how to calculate the switching losses. I appears in THE lt3478 boost converter. I have inductor current, I have Vout and Vf but I don't know from where it gets te 2ns and the 0.7ns. If I knew how to calculate those values I could potentially calculate by hand the switching losses for the NCP3066.....

 

[d123]

Hi,

Are the 2ns and 0.7ns related to normal switching or to zero current switching, etc., and/or what point/level the inductor is at when the MOSFET switches on and off, maybe? I haven't read about ZVT and so on for months and it's something else I'm not that well-read about.

TI have an app note about DC-DC converters which includes waveforms of interest and a few formulas, and a 'cheatsheet' poster. I guess you'll have seen these already. If not, the slyu036 pdf handbook of power topologies has about ten pages of boost formulas that might be insightful if not a solution.

 

[d123]

Hi Winsu,

I think you know how to do these PD conduction and PD switching calculations already, but still.

MOSFET power losses and how they affect power-supply efficiency

That 7ns and 0.2ns is fascinating.

Pages 2 and 3 might indicate something about where those times are obtained from in PRACTICAL CONSIDERATIONS IN HIGH PERFORMANCE MOSFET, IGBT and MCT GATE DRIVE CIRCUITS - gate charge graph where switching on, rising current and falling voltage overlap and switching off opposite direction Ids and Vds overlap can be calculated from nC graph and device capacitances in datasheets. Toshiba (Toshiba Semicon) usually have some interesting app. notes on several topics, including switching losses, etc. This one attached complements the Unitrode (pause for joy, typed application notes from yesteryear) 'Practical Considerations...' one. Unitrode (TI) have a good few application notes about SMPS.

I wonder if the 7 ns and 0.2 ns are not specific to the NPN switch in that IC... You could write to AD to ask where those numbers come from as a last resort.

Good luck.

 

[Winsu]

Hi d123,

Thanks for your interest. It is very useful information. I dont have the time until the weekend to have a look to this properly but I will as it is interesting.

I think those times have to be related to capacitor discharge times. When the voltage that is between mos fet terminals goes to a certain level, the current flow increases. Those 0.2ns and 7 ns must be related to that. I guess they will be specific times for the mos fet used in the application.I guess that info will be in the documentation that I have scanned right now .

I have given up using the NCP3066 as it is getting too hot and I am not sure I could use it for my application. Instead I am using the LM3479, which has a much lower ambient to junction temperature resistance. It has got a bit more circuitry but it will do the job.

Thanks a lot for that info. I will get back to you once I have digested it .


I had a quick look and I think this is the key point ( for charging)

Knowing the capacitance and the current output by the driver we can get the rise time.

The discharge time is just 0.2ns. it is very short, but I suppose it will be very similar on every mosfet because effectively it is like discharging a capacitor by connecting it to ground.

 

[Nicolas13s]

Hi Winsu,

I think you know how to do these PD conduction and PD switching calculations already, but still.

MOSFET power losses and how they affect power-supply efficiency

That 7ns and 0.2ns is fascinating.

Pages 2 and 3 might indicate something about where those times are obtained from in PRACTICAL CONSIDERATIONS IN HIGH PERFORMANCE MOSFET, IGBT and MCT GATE DRIVE CIRCUITS - gate charge graph where switching on, rising current and falling voltage overlap and switching off opposite direction Ids and Vds overlap can be calculated from nC graph and device capacitances in datasheets. Toshiba (Toshiba Semicon) usually have some interesting app. notes on several topics, including switching losses, etc. This one attached complements the Unitrode (pause for joy, typed application notes from yesteryear employee tracking software) 'Practical Considerations...' one. Unitrode (TI) have a good few application notes about SMPS.

I wonder if the 7 ns and 0.2 ns are not specific to the NPN switch in that IC... You could write to AD to ask where those numbers come from as a last resort.

Good luck.

Hello! Please tell me where you can see how to correctly calculate the conductivity of partial discharges and switching partial discharges. Thank you.

 

[dick_freebird]

Some switching losses will be in the power FET channel
and some will be in the gate driver and any gate
"shaping" network.

All of these can be gotten at through SPICE simulations
more accurately than a textbook calculation. As shown
above, the Miller plateau is a prime (not good) region
of FET dissipation as the drain swings through high voltage
at high current, and gate driver dissipation as the gate
voltage likewise "hangs out" at a nontrivial voltage at
peak driver current (or a value limited by the gate
network).

Acquire the "thermal slug" in each of the components
for one round-trip gate cycle at full load and you'll
have a per-cycle rollup that then (multipled by fSW)
gives you a switching-loss wattage.

Breaking it down into inefficiency components will
lead you to where the losses are, in a way that an
efficiency calculation will not. And you will know
how much goes to what heat sink.

 

[Easy peasy]

you cannot expect too much from the SOIC part, if you want 20W out you'll need to buffer it per the figures in the data sheet.