[SOLVED] Power Islands - criteria for using

[phoenixpavan]

Hi guys,

Can some one throw some light on the concept of Power Islands? How do we decide on creating these? How does the power n/w look like when we do this t/c?

Thanks

 

[paulki]

Hi Pavan,
Power Islands are the mechanism in Power Aware digital circuit (One of the Power Aware method). Take an example of a SoC, It has a core (working at .9V), Protocol bridge (working at 1.2V), Inbuilt Memory (working at 1.5V) and Peripheral interfaces (working on 3V). In this example itself 4 different voltages are required for the normal operations. So isolate each module boundary separately in the SoC, identify the level-shifters for the boundary cross, switch off the power to the non-using modules will save Power entirely.
But there should be proper protocol for power-up and power-down sequences in the power aware designs. Most of the Mobile Chips are Power-Aware capabilities nowadays.

-paulki

 

[phoenixpavan]

Thanks Paulki,

What I am more interested is what will be that proper methodology for designing such SOC's. How we will do power analysis on such designs with varying Voltages being supplied on the same chip? How will be the power flow set-up in such designs?

TIA

 

[paulki]

Hi phoenixpavan,
1. In simulation, method which is called as Power Aware simulation. Behavioral model of power-aware cell identification, creation of power-wrapper, then simulation. In GLS, we've to capture the Power-aware cells (retention flops, memories, caches, etc) and apply Stimulus and verify according to the spec.
2. About the varying voltages, in simulation we dont worry much, because we're doing "LOGICAL" simulation, not "ELECTRICAL" simulation (As like Analog Mixed Signal simulation does). As per the behavioral models, we've to apply the proper Vdd-Vss.

These are only high level flow, lots of manual-automation effort are required for a proper Power-Aware simulation setup.

-paulki

 

[phoenixpavan]

Can you give me some Physical Design perspective on this Power Aware Designs?

 

[paulki]

Hi Pavan,
Extremely sorry, as I'm from the Functional Verification domain, not able to comment anything on the PD perspective.
Dear forum members, please throw sime light on the PD perspective.

-paulki