Power integrity in PCBs

[engr_joni_ee]

I was searching and reading about power integrity importance for FPGA/SOC based PCBs. Some important points in this regards are:

1- Use thinner dielectric between power and ground plane.
2- Use multiple de-coupling capacitors in parallel for example 1uF, 100nF, and 10nF.
3- Use smaller packages for example 0603 and 0402 and mount them close to the IC.

I am thinking about the dielectric material and dielectric constant. We know that this is important in signal integrity to use low loss material with lower dielectric constant. How the dielectric constant is influenced on the power integrity ?

 

[KlausST]

Hi,

"loss" is ignorable when considering dielectric between power planes.

1) For sure thinner dielectric increases capacitance. But for most applications I recommend to just use the standard thickness.
2) The smaller one closer to the IC pin.
3) ... the goal is to get a "stable power supply", this means the supply should be low impednace even for very short current spikes.
You get this by considering the whole decoupling (capacitor) path as a loop.
It is NOT only important to get a short connection between FPGA_VCC and decoupling capacitor ...
but also:
* Capacitor, short trace to via(s)
* via(s) to a really solid GND plane
* GND_plane to FPGA_GND
* ... GND_plane to the signals leaving the FPGA

MIND:
In opposite to DC resistance ... you can NOT compensate a lenghty trace with a wider or thicker trace to get low impedance.
--> keep the whole loop (traces) as short as possible.
Trace with and trace thickness has rather low impact on the resulting loop impedance.

Klaus

 

[engr_joni_ee]

Consider the following four layer stackup with a thick dielectric core between L2 and L3.

L1: Power/Signal
Prepreg
L2: Ground
Core
L3: Ground
Prepreg
L4: Power/Signal

When it comes to power integrity, which dielectric material is better as prepreg between L1 and L2 also between L3 and L4. The standard and most commonly used FR4 with high Dk or Magtron-6 with lower Dk ?