Power Good(OK) Circuit References?

[JohnLai]

Hello, Folks,

I am working on Power Good(OK) IC circuits lately, but could not find any good reference books and papers. Can anyone recommend any good books and papers for this subject?

Thank you.

 

[mtwieg]

Are you talking about PG indicators for DC-DC converters, AC-DC converters, or AC appliances?

As far as DC-DC converters go, I haven't really seen any standard in how PG detection is specified. Usually it requires that the output voltage be within some margin of the nominal setpoint (like +/-10%), and that the input voltage is within a certain acceptable range (so it has UVLO and OVLO). The exact numbers of those thresholds vary quite a bit. If you want to detect current as well, then things become much more complicated... ultimately it depends on the needs of the load you're driving. So I doubt you'll find any literature that goes too in depth into power good circuitry, unless it's quite application specific.

 

[JohnLai]

mtwieg:

Thank you for your kind reply. Yes, I am designing a DC-DC converter for 1.8V power good detection. Either too high or too low will generate power error signals. If you have some good application specific documents, could you please reference them?

Thank you.

Are you talking about PG indicators for DC-DC converters, AC-DC converters, or AC appliances?

As far as DC-DC converters go, I haven't really seen any standard in how PG detection is specified. Usually it requires that the output voltage be within some margin of the nominal setpoint (like +/-10%), and that the input voltage is within a certain acceptable range (so it has UVLO and OVLO). The exact numbers of those thresholds vary quite a bit. If you want to detect current as well, then things become much more complicated... ultimately it depends on the needs of the load you're driving. So I doubt you'll find any literature that goes too in depth into power good circuitry, unless it's quite application specific.

 

[dick_freebird]

I've never had the benefit of reference literature for this
kind of work. It's sort of grimy industrial type stuff that
doesn't interest professors and professional society pubs.
But some things I've found along the way:

- You need a bandgap that boots at as low a voltage as
possible, and this will never be low enough to prevent a
"hiccup" somewhere in the low end of turnon ramp.

- To deal with this you need some sort of early-on
backstop, that can assert a proper logic state from zero
supply to past where bandgap and comparators are up.
You may also want to shunt the back end of the PGOOD
logic because it will need help on supply ramps to give
the right answer against dV/dt currents when the FETs
are weakly powered.

- your backstop circuit will probably have a wide range
of threshold variation especially if this sees extended
temperature, and can cause as many problems as it
solves. "Tweaky" for sure, especially as your working
supply decreases.

- You want to decide how to ride out supply dynamic
perturbations, such as load-steps and their ringing.
A time domain filter of some sort is desirable, its
attributes have to come from some understanding of
the power environment or you have to assert such
power-quality requirements as a use condition, not
an especially customer-friendly posture.

In general "good" is subjective and supply combinations
and variations are semi-infinite, so you (like the rest
of us) will probably have to muddle through.

 

[yamato96]

All pg circuits ive crossed by are based on 2 comparators. if the need for a 1.8v dc surveillance is due a specific ic demand , maybe a voltage supervisor ic would worth some checking. good luck.

 

[JohnLai]

Dick and Yamato,

Thanks for your suggestions. Is there any circuit diagrams on the web we can share. It is fine if there is none.

 

[yamato96]

a 2 min check on ti website .... https://www.ti.com/product/tl7700, sample available and in dip package!!