power and resistors to signal pins

Hello all,

I was looking at the design files of Xilinx AC701 board and I have some questions. In the picture, in the A schematic what is the functionality of that circuit? FPGA_DONE is not an open drain but a bidirectional IO. What is going on when is set as output? In B, why is using the extra power through R193? Isn't the CTRL2_PGOOD (14 from 3.3V FPGA IO) enough to trigger the FET? And finally the use of R22 in C? For noise filtering?

Regards

done is a configuration pin and it gets driven low by the FPGA when the FPGA has not completed/startd configuration. Once the FPGA configures it's driven high by the FPGA. It's not an I/O pin.

For B the R193 isn't for power it's a pullup. The TI part probably has an open drain output (didn't take the time to check) so you can wire or them together for a single power good signal for when all the supplies come up. When all the TI controllers say power is good the open-drain stops driving and the pullup resistor enables the FET.

For C not sure why that was done. I think it should be a pullup to the VCCINT supply not a resistor to ground, that just burns power. Maybe they wanted a hand warmer ;-)
Wait a minute, I suspect it's to detect power on the VCCINT supply. If VCCINT hasn't come up the LED won't light, since the gate is pulled to ground, VCCINT has to be up before the LED lights up.

Regards

So, if I am right, for A when the FPGA drives the configuration pin low (connection to ground) the current pass through the resistor directly to the ground and the LED is off. When the conf pin is high then the LED is On.

For B the (39.45) TI pins are General-purpose discrete I/O and not open drain. :-(

You are right. I looked in detailed the TI datasheet "Each GPIO has configurable output mode options including open-drain or push-pull outputs that can be actively driven to 3.3 V or ground."

For B the (39.45) TI pins are General-purpose discrete I/O and not open drain.

Click to expand...

They can be configured as open drain too. Did you check that thay aren't open drain?

FvM said:

They can be configured as open drain too. Did you check that thay aren't open drain?

Click to expand...

Yes, I saw it after a while and I corrected it in my previous post. Thanks