Polysilicon resistor : Stress independant layout

Hello, what techniques cqn I use if I want to layout a resistor in sutch a way it becomes unsensitive to stress.

I know the units must be placed in such a manner :

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But i have nothing to confirm this. Has someone experience with this?

Use dummies and enough spacing to n-well borders.

But I am not interested in matching resistors. What I want is a resistor that stays stable, even when extra stress is applied on the package. So if I have 160 unit fingers, I place 2x40 units horizontal, and 2x40 units vertical. These two groups are placed cross quad. The number of units is chosen in sutch a way the that the final result is a perfect square. The different orientation of the units cancels out the effects of stress.

I have seen this before, but I have nothing to back it up. Maybe someone knows a paper or book that references this?

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But I am not interested in matching resistors. What I want is a resistor that stays stable, even when extra stress is applied on the package. So if I have 160 unit fingers, I place 2x40 units horizontal, and 2x40 units vertical. These two groups are placed cross quad. The number of units is chosen in sutch a way the that the final result is a perfect square. The different orientation of the units cancels out the effects of stress.

I have seen this before, but I have nothing to back it up. Maybe someone knows a paper or book that references this?