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Imagine you have two NWELL's some um apart. In between there is thick field oxide and underneath PSUB. If there is a poly wire at high voltage above the field oxide it could trigger leakage currents between the NWELL's. Simply the poly is a NMOS with NWELL's as drain/source and PSUB as bulk. Depending on field oxide thickness the threshold voltage is between 5V and 30V. But also below threshold there are leakage currents.
Good verification setup detect the unwanted componenents. Metal gate MOS exist also but the distance is higher because there is an additional CVD oxide.
Just as poly can create a parasitic mosfet it can be used to prevent one by applying to correct potential to it. If it is between 2 N-diffusions tie it low, if it is between 2 P-diffusions tie it high.
Metal runs next to diffusions can also create parasitic mosfets and by adding a poly ring around the diffusion and tieing it to the correct potential it can prevent the metal run from forming the parasitic mosfet.
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