lastdance said:remember two basic things. A pole is suppose to cause gain to decrease and a zero is suppose to be opposite, AND capacitors tend to be a short at high freq.
with this, the dom pole will be at the output. (Cload.Rout)
disregard the miller (Cds) first.
redraw the cascode CM load as simple CM, easier for analysis
there r two poles of interest next. 1st will be the CM diode, since it cause the gain to decrease if the Cgs is shorted out. ~(1/gm.2Cgs). only caused u to lose half of the gain though.
2nd will be the NMOS cascode pole at the source. I think this should be more dominant than the CM depending on the gm of this transistor. for comparable gm, this will be more dominant, as it affect the gain more than the CM pole.
u should make sure that the cross over is at least one decade below the next dom pole for optimal stability.
qslazio said:lastdance said:remember two basic things. A pole is suppose to cause gain to decrease and a zero is suppose to be opposite, AND capacitors tend to be a short at high freq.
with this, the dom pole will be at the output. (Cload.Rout)
disregard the miller (Cds) first.
redraw the cascode CM load as simple CM, easier for analysis
there r two poles of interest next. 1st will be the CM diode, since it cause the gain to decrease if the Cgs is shorted out. ~(1/gm.2Cgs). only caused u to lose half of the gain though.
2nd will be the NMOS cascode pole at the source. I think this should be more dominant than the CM depending on the gm of this transistor. for comparable gm, this will be more dominant, as it affect the gain more than the CM pole.
u should make sure that the cross over is at least one decade below the next dom pole for optimal stability.
Do you mean COMMON MODE for CM?
Dear ambreesh,ambreesh said:Dear Alles Gute,
What is this miller effect of Cgs5 you talk about.
I have never observed it.
Next, I hope u have smaller lengths for PMOS connected to supply so the would have lower parasitic capacitance. I suggest lower lengthe as their Vds would be small which is dependent on your bias voltage for lower PMOS.
Assuming that vdsats for common gate transistors and the PMOS' are same I expect the Gm' to be same. As NMOS has more mobility than PMOS it would have smaller W/L and thus smaller Cgs thus mirror node would have higher probability of being the non-dominat pole. But all this is on the assumption and you W and L choice.
Else the fight for non-dominat pole is between source node of common gate amp or the mirror node
bastos4321 said:No, but the most important are the poles in A and in B nodes. The others will be less significant for the behavior of the amplifier.
Bastos
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?