pmos folded cascode vs nmos folded cascode for LDO

I like to work backward from the pass transistor because
its required gate swing defines a lot of things. Your error
amp will comprise both NMOS and PMOS, which is the
diff pair and which is the load is a design trade study.

You will have different concerns and topologies favoring
DC PSRR, and HF PSRR. Large capacitive coupling
between a PMOS pass FET and a ground referred
error amp, is a HF PSRR challenge. A PMOS pass
FET will be larger than a NMOS pass FET, but the
NMOS will require "above the rail" gate drive and that
can't be had without either SOI, triple well or an excess
gate-body voltage capability (and body effect will suck)
if you're stuck with cheap JI basic flow.

Folded cascode may be better than regular cascode
for absolute headroom when there's > VT for headroom,
but once folded loses its headroom it's no better. You
may do better at the big end and the cutoff end, by a
longer-L single in the final gate drive mirror (smaller
pass FET if larger drive, which is then easier to drive
and to stabilize than a big pig with weak drive).

Input Reference Voltage would also matter.
If you are constrained to use only a particular reference voltage for your LDO, then that will restrict what input pair you can use.
For example, if your reference voltage is less than Vds_sat + Vth of an NMOS, then you would have to use a PMOS input pair. And similarly if it is more than Vcc - Vds_sar + Vth of a PMOS, then you would have to use a NMOS input pair.