there are two flipflops....one flip flop(FF) was havng a clk of 10MHz and the other 18MHz...the o/p of 10MHZ FF was fed directly to I/P of 18MHz FF.now wht are the problems in this circuit(if any) and what are the remedies for them,,,,,take the FF as T-FF
Yes, since the sampling times are not really compatible, glitches can occur at some points. Depends on the function. If a divider is what is meant, they may not be severe