Pls Elmer me on PLL filter design

[gbugh]

I am trying to design a 3rd order PLL filter for a VCO that will cover 200MHz to 400MHz. The amount the VCO frequency will be divided down is easily changed to match the Ref frequency. But if the VCO must be divided down twice as much at the high end versus the low end to match the Ref frequency so then, is it usually best to design the 3rd order filter for best stability at the 400MHz end of the VCO range and then it will automatically be stable at the 200MHz end of the VCO range?

Does this make it not responsive enough at the low end of the range?

I see a lot of online calculators for filter component values but I don't see any where the calculations include a parameter for the VCO's frequency range or a parameter for a range of values for N that the VCO frequency will be divided by. They only allow a single fixed value for N and then if N changes they give different component values. Has anyone seen an online calculator where I can enter the VCO range as one of the parameters or that allow a range of values for N?

What do most designers do to pick the best component values for an octave range?

Must I devise a way to change component values as the VCO frequency goes from one end of its range to the other? I'm hoping to avoid that.

 

[gbugh]

Must I devise a way to change component values as the VCO frequency goes from one end of its range to the other? I'm hoping to avoid that.

It looks like the charge current is the one parameter that can change with frequency that will allow the filter component values to stay similar from 200-400MHz. I need to ramp down the charge current to half as the frequency goes to half. I might try a FET as a variable resistor. Maybe an N-Channel Enhancement Type MOSFET actually, because its off at 0V and turns on with more positive voltage.

--- Updated Yesterday at 9:35 PM ---

It looks like the charge current is the one parameter that can change with frequency that will allow the filter component values to stay similar from 200-400MHz. I need to ramp down the charge current to half as the frequency goes to half. I might try a FET as a variable resistor. Maybe an N-Channel Enhancement Type MOSFET actually, because its off at 0V and turns on with more positive voltage.

Never mind. It looks like an an N-Channel Enhancement Type MOSFET as a variable resistor will only work well without much voltage difference between Source and Drain and there's no place in my existing circuit where I can easily do that.

 

[BradtheRad]

This isn't an ideal solution though it may illustrate the principle. LC series modifies unknown waveform. The result is a sine-like waveform. Values were found by experimentation (values appear optimal at 300MHz). Notice the inductor governs how quickly or slowly the waveform rises. The capacitor governs how quickly or slowly the waveform falls.

As you point out, current in the path affects the wave-shape. There is the input and output resistance. Both have their influence.

 

[gbugh]

This isn't an ideal solution though it may illustrate the principle. LC series modifies unknown waveform. The result is a sine-like waveform. Values were found by experimentation (values appear optimal at 300MHz). Notice the inductor governs how quickly or slowly the waveform rises. The capacitor governs how quickly or slowly the waveform falls.

As you point out, current in the path affects the wave-shape. There is the input and output resistance. Both have their influence.

View attachment 196584

I'm not sure I understand. The signal I need to attenuate is coming out of the phase detector and is at the frequency of the VCO/N=Reference frequency and for this design I have a very low reference frequency. If I lower the phase detector output amplitude with more in series low pass filtering, I think that will add extra phase delay which I want to avoid. Actually, your suggesting selective frequency or high pass filtering, yes? I have to study that some more.

--- Updated Yesterday at 10:44 PM ---

I'm not sure I understand. The signal I need to attenuate is coming out of the phase detector and is at the frequency of the VCO/N=Reference frequency and for this design I have a very low reference frequency. If I lower the phase detector output amplitude with more in series low pass filtering, I think that will add extra phase delay which I want to avoid. Actually, your suggesting selective frequency or high pass filtering, yes? I have to study that some more.

Never mind, my detector output will always be a fixed frequency so I can't use frequency to adjust the amplitude. At least not in series with the detector output.

--- Updated Yesterday at 10:58 PM ---

It is the Charge Pump current in this diagram that I have to double for double the VCO frequency: https://www.changpuak.ch/electronics/pll_loopfilter_calc.php

 

[gbugh]

I think I can put an analog switch inline with the charge current and switch it through for fixed durations but at changing repetition rates so as to get more charge current at higher frequencies and less charge current at lower frequencies.

 

[BradtheRad]

A thing to experiment with is the capacitor Farad value in the voltage doubler. You may find a particular value which can be unchanged yet results in the Ampere range and Voltage range which you wish, perhaps automatically.