PLL : connections btn behavioral params and ckt params

[hyc]

Most PLL literatures seems to spend a great deal on the behavioral level analysis to determine best behavioral level parameters, for example, Kvco for VCO gain, Kpd for Phase detector gain, etc., but say very little about the connections between behavioral level parameters and the ckt level or transistor level parameters. Take for example, once I know my target Kvco, is there a way to futher associate it with transistor level parameters, such as gm, gds, Vt, Vdsat, etc? Can anyone refer me to any books, papers that might provoide such information?

Thanks in advance.