I work at 2.4Ghz.
My PA stage seems to work fine but I can control the peak and lower it if its a problem (Its just a trade off between Pin and Ampification). The 2V peak is what I got with a transient analysis before the Matching network I used and I am pretty sure its in saturation region. I dont understand your question (across what impedance?).
The paper I am working on doesnt mention anything about an output stage and simply drives the output of the common gate PMOS of the folded Cascode topology to an L matching Network and I did that and all I got was what I mentioned. I can clearly see some other tranzistors(2 or 4 cant really see clearly) in layout except the ones in the schematics on paper so I guessed that there is a buffer that doesnt get mentioned or something else.
So my problem basically is that with that approach I cant get a satisfactory 1dB compression point, or reach 1mW output. So I am searching for a way to get that swing to the 50ohms.
S parameters and impendance matching are checked with Spectre.
Thanks for answer.