bjzhangwn
Member level 1
cam in fpga
I want to implemented the cam in the fpga,the entry is 2048,and the width is 32,the frequncy I need is not too much ,the read latency can be 3-4 cycles,and the cam core in xilinx fpga use the huge luts,so if I can reduce the lut by delay the data read out.
I want to implemented the cam in the fpga,the entry is 2048,and the width is 32,the frequncy I need is not too much ,the read latency can be 3-4 cycles,and the cam core in xilinx fpga use the huge luts,so if I can reduce the lut by delay the data read out.