Please help me: how to design a low current(nA) reference

I want to design a low current(level of nA) reference, could someone give me some good idea?
and you are welcome if you have any good idea about the start up circuit of zero current.

use depeletion nmos process.

thanks, could you give me some detail information?

there are some ieee paper about it.
go to the lib and find them

Yes, I searched some IEEE paper, but there are not about the startup circuit of zero current in High voltage (such as the VCC=30V), could someone give me some help?

it need not startup circuit.
by the way, 30V maybe to high for that kind of circuit.

Re: Please help me: how to design a low current(nA) referenc

As a low voltage designer:
1) It is possible to design a nA circuit with a 30V supply, but it would be a huge circuit and would involve a TON of stepping and cascoding (IMO, anyways). It seems rather silly to draw that little power with such a large supply voltage. If you are using such a supply, power doesn't seem like it would be a concern...

2) Use standard fets in the weak-inversion region. They will act like BJTs for design purposes and you can get nA out of them. I've completed many designs in this region. Very good documention out there as well for this region.

Added after 2 minutes:

Note after re-read:

After trying to understand the post better, it seems you are looking for a startup circuit that consumes only nA to not waste static power after startup, is that it? If so, sizing of any common startup circuit could help, but with a 30V supply, you will have to be VERY fancy to get nA out IMO.

Is this what you are asking? For a low power startup circuit for a high voltage circuit?

Re: Please help me: how to design a low current(nA) referenc

I need a current ref. with low power (nano level), so the startup circuit can't consume too large current.

I can use a resistor to generate this current, but the area of the resistor is very large (because of vcc=30V)

Re: Please help me: how to design a low current(nA) referenc

The often cited startup circuit has its roots in the bipolar implementation of the famous PTAT circuit. Normally the current loop gain at low current levels is equal to the device size ratio containing the current level defining resistor. That make shure that the loop increases the current up to point where the voltage drop across the PTAT resistor equals

VT*ln(device size ratio)

A bipolar device has a constant current gain from base to collector over more than 6-8 decades. But a low currents the beta drop below 1. Because the PTAT loop has also to source the base current the PTAT loop gain drops below 1 at very low current levels. The startup circuit was designed to bring the current level in the PTAT loop above this critical level. Also the startup time is much faster if the current level is near the target. Professional startup circuit design place the current near the target and is switched off if the bandgap voltage is reached. So startup have two aspects; overcome bipolar beta drop and startup time.

In the case of MOS PTAT the device is operated in subthreshold and there is no beta issue like in bipolar. Only threshold voltage mismatch impact the accuracy of the PTAT current. At low current level startup could be missed because of leakage current failures. Normally leakage increases with device sizes. So you can assume to have startup from leakage levels. But if there are mismatches in the leakage bigger than the loop gain the PTAT does not start. Practical MOS PTAT are started by startup currents generated by coupling cap charge current into the loop. The trick is that only positive rising VDD inject current. That helps also increase startup time.

1pf*1V/ms=1nA

Re: Please help me: how to design a low current(nA) referenc

Hi rfsystem:
Will u draw the circuit scheme in ur post? I also want to study.Thks in advance!

Re: Please help me: how to design a low current(nA) referenc

check out gray and meyer 4th edition -- chapter on biasing and mirrors.

best reference.

Because the total current of "startup circuit" + "current generator reference" < 1uA for low power application, so the normal circuit can't meet the requirement.