Please comment on my X-or design

[Syukri]

This is my design of X-or...can I get any comment on it..it's good or bad

 

[Syukri]

Re: Any comment on this?

Below is the simulation using BSIM3..

Thanks in advance

 

[rfsystem]

Re: Any comment on this?

Try to put the PMOS and the NMOS within the same row. Because of the higher DRC distance of wells to active you should get a more compact design

 

[sunking]

Any comment on this?

merge the pmos together.

 

[philipwang]

Re: Any comment on this?

Dear Syukri,
1. Try to design more compactly, the area of layout is related to price directly,;
2. Try to avoid the gate poly trace, metal and gate are all can be used as connect line, but their R are different, so try your best to avoid tracing through poly.

Bg,

 

[Yun Lin]

Any comment on this?

1. Draw the PMOS and NMOS in two row.
2. Adjust the circuit according to the layout.
3. Decrease the layout area as you can ( The area is money)
4. Avoid use ploy as connect wire.

 

[Syukri]

Thanks

Thanks alot guys..

This my first X-or design, I've made new one with pmos that share the same nwell.

I though that if I order all the transistor on one row, it's not a good idea coz my IC's will be lengthly...that why i put the last one below..

Thanks for telling that i should put it in a row..

About that poly, i don't have router, so if i wanted to use metal more rather than poly then my design will be larger, and if i use multiple layer, my switcihng time will rise due to capacitane increase.

I'm rising the value of resistance on my circuit is because i wanted a low power consumption by

P=Vdd².C.f
where f=1/τ and C=τ/R

resulting P=Vdd²/R

so higher resistance will make my power lower right?

Ant comment on the simulation? Why does it has voltage fall and rises at some place where else is should be high or low?