pipeline multiplier in spartan 3

[vaf20]

pipelined multiplier doc

hi all
suppose we have a DSP block which include 10 multiply operand as follow:
(a0*a1 + a2*a3)(a4*a5+a6*a7)+(b0*b1+b2*b3)(b4*b5+b6*b7)
as u see , we must calculate 8 mul. at first then 2 mul. remaining.
so from speed view design plus trade of with area which method is better ?
i think pipeline multiplier give a high performance . what's ur idea?
if i am right , i would like to use spartan 3 MUL(18 bit * 18 bit or higher ) with pipeline method .can anyone give me some nice doc about pipeline multiplier in spartan 3 ?

vaf20

 

[SphinX]

Salam,

**broken link removed**

Bye

 

[vaf20]

shokran SphiX
but i mean use opipeline method and MUL module as a logic resource in spartan 3.
can ne1 help me ?

 

[vaf20]

i am looking for a way to fastest method which calculate above experesion.
Gracias

 

[Aser]

Spartan-3 multipliers are rather quick without inner pipelining.
You have to enter registers for input data, results, and intermediate results.
But the problem is where you get the input data.
Spartan chip can provide less PAD number than needed for them.