lhlbluesky
Banned
problem with pipelined adc
for a pipelined adc, the performance of it (SNR\SNDR\INL\DNL\THD etc)will decrease with the increasing of input sine frequency; then what's the reason?
for a 10bit 15M pipelined adc(just for circuit simulation, not for the chip test), its ENOB=9.8 at 300k input sine frequency, while when input sine frequency increases to 7.5M or so, its ENOB=7.8, why? Why ENOB decreases so much? and what are the possible reasons?
pls give me some advice,thanks everyone for your reply.
for a pipelined adc, the performance of it (SNR\SNDR\INL\DNL\THD etc)will decrease with the increasing of input sine frequency; then what's the reason?
for a 10bit 15M pipelined adc(just for circuit simulation, not for the chip test), its ENOB=9.8 at 300k input sine frequency, while when input sine frequency increases to 7.5M or so, its ENOB=7.8, why? Why ENOB decreases so much? and what are the possible reasons?
pls give me some advice,thanks everyone for your reply.