PIN diode layout.............?

[vinaysingero07]

can any body tell me how to draw the layout of pin diode in tanner`s L-edit.
also how to draw isolation among different diodes on the wafer.

 

[leo_o2]

Please use P+ and NWell/N+ guard ring to isolate diodes.

 

[vinaysingero07]

Please use P+ and NWell/N+ guard ring to isolate diodes.

hey leo_02 can u please elaborate............
for drawing layout...........
thanks...

 

[erikl]

As leo told, you can use several P+ diodes on Nwell, if they may share their common cathodes (or N+ diodes on p substrate, if they can share their common anodes). I they can't share a common node, use N+ diodes in separate Nwells. The layout is arbitrary -- can be circular, square, rectangular -- whatever your design system allows for. Diodes' size depends on your application. With a std. CMOS process, however, you can't get a very good PIN diode, as the "I" zone will be rather thin, in the order of only one or a few microns, not much for a good radiation capture sensitivity, if this should be your application.