Bobson2000
Junior Member level 2
Hi.
Im designing PCB with DDR4 and FPGA chip. I provided design rules to match the traces lenght/delays (in some rules there was delay in some there was lenght), but im little confused about taking into acount package pin delays/lenghts by calculating algorithm. In DDR chips i have entered pins delays (in ps), from IBIS model, which no contain package lenghts. For FPGA chip i have entered package lenghts (in mils) for each pin from IBIS model, which no contain pin delays. Now i need to convert all delays in ps to lenght (for DDR), and lenghts to delays and enter it to chips libraries, but for signal lenght/connected lenght, DDR package lenghts are not taken into account, and othervise for net delay the FPGA pin delays are not taken into account. So i think desing rules can't fullfil his role in these conditions. I found some another projects where this data are not entered at all, but boards work fine
So my question is:
1. Im something wrong or missleading? Or doing wrong?
2. Can i just simply convert package lenghts <-> pin delays using conversion factor 6.5ps/mm (0.165ps/mil)?
3. Can i enter some formula to libraries to automatically converst it?
Best regards.
Im designing PCB with DDR4 and FPGA chip. I provided design rules to match the traces lenght/delays (in some rules there was delay in some there was lenght), but im little confused about taking into acount package pin delays/lenghts by calculating algorithm. In DDR chips i have entered pins delays (in ps), from IBIS model, which no contain package lenghts. For FPGA chip i have entered package lenghts (in mils) for each pin from IBIS model, which no contain pin delays. Now i need to convert all delays in ps to lenght (for DDR), and lenghts to delays and enter it to chips libraries, but for signal lenght/connected lenght, DDR package lenghts are not taken into account, and othervise for net delay the FPGA pin delays are not taken into account. So i think desing rules can't fullfil his role in these conditions. I found some another projects where this data are not entered at all, but boards work fine
So my question is:
1. Im something wrong or missleading? Or doing wrong?
2. Can i just simply convert package lenghts <-> pin delays using conversion factor 6.5ps/mm (0.165ps/mil)?
3. Can i enter some formula to libraries to automatically converst it?
Best regards.