Look into jitter analysis of ADC's, Phase modulation, and DDS systems. Each can be helpful.
the uncertainty generates sidelobes for the same reason phase modulation does. The equivalent index is low, so you probably will only see one sidelobe. The effects become more pronounced for high-speed ADC's sampling signals above Fs/2 (bandpass sampling). The DDS's also have similar phase-quantization issues. In such cases, spurs are generates reducing SFDR. in that case, randomizing the phase slightly tends to have the effect of spreading the phase error out over the entire spectrum.
things like power supplies can affect the phase of a single-ended clocking system, resulting in a slightly modulated clock and thus small sidebands at the power supply switching frequency.
in the DDS case, the algorithm has quantization, which can either be correlated (resulting in spurs), or uncorrelated (resulting in noise).
I'm not sure of your application.