You can generate double the frequency clock by using an XOR gate and a delay chain. Hook up the undelayed clock to one XOR input and delayed to the other, you will get a clock at twice the speed (but not 50-50 duty cycle), also the jitter of this clock will depend on the duty cycle of the original 1X clock (so it is important to make that one as close to 50-50 as possible). You can now divide the 2X clock by two and depending on your initial state and time reset to the divider is de-asserted you can get the required phase shift.