Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Phase Shift Full Bridge converter - Transformer magnetizing inductance

Andrew Lee

Newbie
Newbie level 2
Joined
Apr 5, 2024
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
48
Hi
I am still studying a PSFB Vin(750V) to Vout(300V~1000V) 15kW(for EV Charger).

The feedback controllers were designed and implemented to fulfill the constant-voltage(CV) and constant-current (CC) output modes for a powerconverter.
And the switching frequency is 70kHz.
I designed the magnetization inductor to a value without an air gap in the transformer.

Despite my researches, there is something I am still unable to understand : how to choose the transformer's magnetizing inductance ?

Is there any relation PSFB's magnetizing inductor with ZVS at light load?

Thank you
 
Last edited:
Dóh - you work out an acceptable flux ripple in the Tx for core losses and wire fit

this gives you the pri turns ( and the sec )

you can then work out Lpri and the resultant magnetising current - and see if this is large enough for ZVS in a reasonable time at the lower load range

you can then do likewise with a core gap of 0.2mm right thru, etc, to see what you get, at some point the mag current will be ridiculously large.

at some low load you will lose ZVS, even with an extra series L on the pri side, and plenty of Imag,

this is easy to calc.
 
This is one of the drawbacks of PSFB...that to be done "Properly" the i(mag) needs to be high. And it needs to be accurately defined, because you will use it in i = Cdv/dt to find if you will charge/discharge the FETs' CDS's quick enough to give your ZVS.

So straight away you need a gapped core......because ungapped cores have an inductance value which is +/-25%. Gapped cores have much more well defined inductance (less tolerance). Gapped cores are a Pain in the large sizes because they are expensive and may have long lead times.

A "way out" is to use a kapton gapped core set which was originally ungapped. Kapton is very well toleranced in its thickness. Then you just take whatever Imag you get with a layer or so of turns...remember, , ideally you want a full layer of turns on every layer (right across the bobbin), and also , as few layers as poss, so you dont get much proximity loss.

To be honest, with a little bit of series inductance placed in series with the primary, that will mean you switch on with zero current anyway. In fact, even the small leakage inductance of a non-interleaved transformer would do the same thing. That may be enough for you to get your cost down, and also, to get "good enough" efficiency.

Also, remember that PSFB only reduces the turn-on losses.....it intrinsically does nothing to reduce turn off losses...you have to do that by putting a big cap across the CDS of the FETs, and then smash them off hard and quick......so as to reduce turn-off switching loss. And remember that that very same "extra CDS" capacitor will then mean that you then need that bit more i(mag) so that you can still achieve your ZVS.

Also, , instead of just a cap across CDS, you can instead use an RCD turn off snubber...because then the diode means that you dont have quite so much capacitance to charge/discharge at turn-on....because the diode blocks one of the caps. (but unfortunately not the other one).

I think that with your high output voltage , you may be better off with "PFC -> LLC -> SiC Boost converter" so as to give the vout range.
 
Last edited:
Andrew, I'm on a similar journey learning about this and just stumbled on this list today so I hope this information is useful for you and still on time as you asked a week ago.

I took one of Dr Ridley's one day seminars and afterwards made up the attached magnetics design tool in excel. His Design Center has many free videos and his 'one equation' to design transformers and inductors is discussed in one of them.

The excel tool has the equations in it. I think this is the simple answer you are looking for, you need enough magnetizing inductance so that the volt seconds don't saturate the core. That is what the 'one equation' does, it determines the minimum number of turns needed to keep the max flux under the saturation level you decide based on input voltage and duty cycle. Once you have the minimum primary turns figured out, the secondary turns is is determined by the topology you pick.
 

Attachments

  • Magnetics Calculations.zip
    93.7 KB · Views: 151
Last edited:
@decook1110 actually you should choose core size and turns to keep the peak to peak flux excursion low enough that you do not cause excessive heating in the core,

the control determines the balanced volt seconds across the driven side of the transformer - if the control cannot do this adequately a DC blocking cap is required to go with the transformer.
 
@Easy peasy Thanks for correcting that. I stated just the saturation issue of Bmax in the single equation that is just the first check. If you only run the transformer briefly than this is an OK approach. For transformers that operate for longer periods of time or continuously, then a lower value of Bmax should be used. So adjusting the Bmax value for the power supply operating duty cycle (maybe continuous) and how much cooling may be done by moving air is the next step. But that gets back to some of your early posts about having to build and test, and we're still building up experience on how to determine those values.

And chosing core size also works into that one equation, in my attached sample I have the ETD49, ETD59 and E65 cores that are 'convenient' for use on this existing project with its peculiar existing case size and 6 channel control system along with our supply of existing fixtures and bobbins.

Using Bmax of 300uT, 700 volts, 115kHz and a 45% duty cycle, the minimum turns using the spreadsheet for E65, ETD59 and ETD49 calculates to 17.2, 24.8 and 43.7 primary turns. This would determine what the magnetizing inductance and current would end up being, which is what Andrew originally asked. As these calculated numbers require more turns in a smaller transformer core, this is where 'current capacity' of the core starts to be looked at when the combined primary and secondary turns have to be fit into the different windows and then all the proximity effects from the multiple layers have to be accounted for.

In our recent transformer we designed for Bmax at core saturation and 40 amps of average output current at 72 volts. For less turns in a bigger window the E65 core is what we picked. It turns out that at 30amps after running for 45 minutes, the core material heats up enough that even though the temperatures are still not hot enough to be alarming, the rate of temperature rise went from decelerating over time to suddenly increasing over time. So this makes your point about preventing excessive heating in the core by using a lower Bmax. If I'd tracked the duty cycle of that experiment, I could quickly come up with a Bmax value with the tool as a data point for that run time, and by doing this over and over would generate a table for that specific core and winding configuration.

For full disclosure, we didn't design this transformer, someone much smarter than us designed it and informed us we'd have to build and test it to find out its true capacity. Luckily this was not a customer project, but us building a replacement part for existing equipment with a low operational duty cycle, so we get to learn on the job. I applied the 'one equation' afterwards and because of all the research and experimentation, the 'one equation' now connects dots for me. I'm hoping others can pick up on this if they are new to the subject.

If you are interested on the testing I did on this system, here is a shared google drive link where I was trying to recruit some collaborators on the facebook Power Supply Design Group

Dave
 
I think one would normally assume that - for EV charging - as the OP states - the duty cycle will be close to continuous for the time taken to charge a vehicle, hence I am confused by your statement: " If you only run the transformer briefly than this is an OK approach "
The 300uT you state is very small indeed for peak flux in a transformer, at 115kHz, the best ferrite material available would look to 120mT peak, unless real cooling of the cores is available

Your:
" In our recent transformer we designed for Bmax at core saturation and 40 amps of average output current at 72 volts " is non sequitur as the core losses do not relate to the load currents at all - but rather the core flux density and frequency - which is a direct result of the pri turns and voltage and freq

Regarding
" we didn't design this transformer, someone much smarter than us designed it " - it appears their knowledge of transformer design for sensible T-rise over ambient leaves a little something to be desired


Just for the OP - it may be a good idea to construct several transformers for 15kW, say a double E65 core for 3.75kW each - the primaries can go in series and the rectified secondaries can go in parallel to ensure current sharing - this gives lots of surface area for the transformers and allows use of common parts.




 
E.P. Thanks for the input. Per our experience, 120mT may be a better starting point for continuous operation. This was not charging an EV main battery, but was charging the starting battery on a diesel locomotive and then carrying the auxiliary loads during operation, which include cabin HVAC.

Our tranformer designer told us we had to test to get the real numbers from our 'free' design and we did get it to run for 45 minutes at 30amps so I'm staisfied with the initial design because we made the E65 core part of the specification. Also we do have a pair of fans circulating air in the sealed box and push that air over a secondary extruded fin heat sink mounted to the back side of the existing cold plate. When we did the bench test at 30amps, it was stewing in its own stagnent heated air which was a conservative test.

In addition to learning in real time there are a lot of comprosises in the project not directly related to topology.

I appreciate the idea of the series-parallel winding on multiple cores and will keep that in my back pocket as E65 is close to the biggest core I see mounting to a PCB and multiples of them do help the heat discipation. This was first made with a 2 switch forward topology and we're proposing to take a similar format (E65 core, ETD49 Inductor) into a PSFB.

Curious of your opinion on how much more power could be pushed through the same E65 core when going from the 2 swtich forward topology to the PSFB. On the output, I'm planning a pair of ETD49 inductors in a current doubler topology to keep the transformer secondary winding simple and reduce to only two diodes on the recitifer side instead of a full rectifier bridge. My expectation is the current 2 switch forward (E65/ETD49) with all the bugs worked out would be 35 amps for 10 minutes and 25 amps continuous, and a well designed PSFB with an E65 transformer and pair of ETD49 inductors should allow 30% more, or close to 45/33 amps with less EMI?
 
We did a resonant Ph Sh full bridge back in 1999 using half of an E65 ( E + I ) at 80kHz => 3.5kW with some heat-sinking of the core and wires ( litz )

4 of these provided 14kW

not a design for the inexperienced though
 
easily ( although you didn't ask for an explanation - you simply posited a yes / no question ) - the mosfets have capacitance when off - you need to charge one and discharge the other in a reasonable time frame for ZVS - this requires a current at turn off.

At no load, the two legs of the H bridge go up and down in unison - therefore no volts across the transformer - therefore no current in any series branch between the H bridge and the transformer -> therefore no current with which to achieve ZVS at turn off.

As you start to phase shift the two legs, there is now some net volts applied to the transformer - and some current available ( at least to the leg that turns off after the power pulse ) if that current is sufficient to charge/discharge the mosfet Cds in a reasonable time frame - then you have ZVS for that leg - as the current is reduced in the Tx after the dead time ( upper or lower mosfets on ) - the other leg will have a lower energy situation and will not achieve ZVS - this is sometimes called the lagging leg.

So - the higher the total Lleak + external L in series with the Tx, the lower power you can go to and still get ZVS - although at some point the time will become long and the energy will become insufficient to get full ZVS

Running high magnetising current in the Tx can also help - but only to a point.

Lagging leg loses ZVS 1st, then leading leg, for falling power out.

EP.
 
Last edited:
To complicate matters more, a PSFB, of high power, will generally have an extra capacitor put across the FETs Cds so as to reduce turn off losses (by smashing them off fast)....so you need to charge-discharge this aswell.....and to make it even more complicated, its usually not just a capacitor you fit, but an RCD turn off snubber.........so that takes more current to charge than discharge (during the tiny switching interrval) because when discharging it you are going through the resistor of the RCD turn off cct.
 
To be fair - RCD snubbers are more usefully employed on the output diodes - I have never seen an RCD snubber on the driving side mosfets of any phase shift full bridge converter. @cupoftea
 

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top