Hello;
I happen to be working on a new Xscale development platform that will center around the PXA250 CPU. I'm actually trying to bolt up a compact flash slot as a True IDE or ATA device for mass strorage options. I plan to use a Coolrunner CPLD to provide the needed buffering and needed glue logic. However, I do not have much experience myself with Xilinx FPGA's and CPLD's, but I'm willing to help out as much as I can, if in turn you might be able to help me.
However, we do have a PCMCIA solution, in which all the control and glue logic resides in an SpartanXL FPGA and it directly interfaces to the PXA250 CPU using I/O registers.
I'm not sure how much help I can be, but I'll provide as much as I can...
Thanks
tjendon74