PCI-Configuration Header Type 2

[kaskete]

pci config header

Hi all!!
I´m developing a CardBus board with TI-PCI1620 controller and I don´t understand the function of Base Address Registers and CardBus Socket Registers registers and how I can configure them.
Can you say something about this?
Thanks in advance,
Kaskete

 

[Maddin]

pci configuration space header

Hi all!!
I´m developing a CardBus board with TI-PCI1620 controller and I don´t understand the function of Base Address Registers and CardBus Socket Registers registers and how I can configure them.
Can you say something about this?
Thanks in advance,
Kaskete

Kaskets,
the base address registers (BARs) are dynamically configured by your BIOS during the POST process (even when the BIOS option PNP-OS installed is not selected) of your PC and are used to access the internal registers of your PCI controller (the logic that is connected by your application as well as the internal controlregister of the PCI controller)
This way, all resources of your PC are configured in PNP style without conflicts.
Anyway, I designed only a standard PCI card and so I don't know what the CardBus socket registers are used.
regards,
Maddin

 

[artem]

pci configuration header type 2

Hi Maddin

This question is outside of tiopic , but may be you know :
will the BIOS configure PCI COM ports at POST execution ? Actually there is PCIBIOS standard , but I
am not sure , and want to know before bying PCI com port extension card .

 

[Maddin]

standard registers of pci type 2

Hi Maddin

This question is outside of tiopic , but may be you know :
will the BIOS configure PCI COM ports at POST execution ? Actually there is PCIBIOS standard , but I
am not sure , and want to know before bying PCI com port extension card .

Uuups, I didn't hit the topic?? I thought I had, anyway sorry for any confusion if I made some
Concerning the COM ports: I don't know it for sure; most BIOSes let you manually configure the resources used by a COM port (usually fixed to standard values) or will let the system configure it (in most cases the values are equal to standard values)
For extension cards the card must be identified correctly by its BaseClass and SubClass (and maybe it's Programming Interface too, but the PrgIF isn't supported by most devices anyway) which are part of the configuration header. Using this information in conjunction with the I/O space control flag (command register in cfg-space header) (and BAR some information, I think) will let your BIOS assign the required resources (internal registers) and map them to your BAR(s).
Got confused??
To sum it up:
- if your card has the correct Base- & SubClass, it should work in general
- if the flag "I/O space control" is set (1), the internal registers are maped to I/O space and may be make programming easier, otherwise the registers are mapped to memory space
- if you plan to use it with some OS, ensure to get some driver for it (VendorID / DeviceID must match to your card)
That's it (I think )
Hope it helped,
regards,
Maddin