PCB stack desigb for 3.3V and 1.18V power plane

[jtronix]

hello,

two supplies are there in my Renesas microprocessor, how these suplies devide in power plane for multlayer PCB design???

is there have any standard practice to design power plane for dual supply MPU for 4 layer PCB?

My PCB stack:
Layer 1: signal
Layer 2: Power(3.3 & 1.18)
Layer 3: GND
Layer 4: signal

can i use one layer for two supplies??

please guide me for power plane design.

 

[amit.kumar11]

Hi,

your stack up is fine. Please let me know whether top and bottom is sufficient for signal routing. Put the GND layer adjacent to the layer where more routing is there. For example, if in TOP layer more signals are routed GND should be 2nd layer. However it is recommended to use a GND layer adjacent to each signal layer.

You can use one layer for two supplies. But routing of signals over that power layer should be taken care.

Please check the below snap for different configuration for 4 layers.




Amit

 

[hobbyckts]

Yes, Your splitting of plane is fine.

Even you can split a power supplies in a single layer. Make sure copper pouring is done in all the places. Don't leave any place without copper. The fabrication cost may be higher due to this but that will give you the good response from the PCB.

 

[KlausST]

Hi,

Put the GND layer adjacent to the layer where more routing is there. For example, if in TOP layer more signals are routed GND should be 2nd layer. However it is recommended to use a GND layer adjacent to each signal layer.

This is true.

For less sophisticated PCB layouts you may see a solid VCC layer similar to a GND layer. For sure this is critical and it depends on what signals you have (speed, precision analog, ..), the current flow across VCC, and how noisy VCC voltage is.
The VCC plane should have no splits and no embedded traces, then it could safe costs.

In detail the current return path (usually the GND PLANE underneath the signal lines) with the VCC plane is not that short and straight as with a GND plane, so for impedance controlled signal lines it will not be sufficient. The HF return path is partly coupled from VCC plane to GND plane, the other parts goes to all the VCC_to_GND capacitors on the board.

As said: it is critical and it should be well tested before mass production.

Klaus

 

[hobbyckts]

Klaus,

But also it is neccessary to use the GND layer adjacent to power layer right?

 

[marce]

On a 4 layer design this would be a given....
All this is conjecture, without knowing the circuit, the interfaces involved its hard to give true advice... But there are thousands of 4 layer designs out there that work... most will limit the circuitry to something that will work on a 4 layer design, ie no DDR interfaces etc.

 

[KlausST]

Hi,

But also it is neccessary to use the GND layer adjacent to power layer right?

Yes, true. To be at least a bit suitable for HF the should be ne t to each other.

Klaus

 

[cks3976]

hello,

two supplies are there in my Renesas microprocessor, how these suplies devide in power plane for multlayer PCB design???

is there have any standard practice to design power plane for dual supply MPU for 4 layer PCB?

My PCB stack:
Layer 1: signal
Layer 2: Power(3.3 & 1.18)
Layer 3: GND
Layer 4: signal

can i use one layer for two supplies??

please guide me for power plane design.

My two cents to the discussion. It is a normal practice to have GROUND layer adjacent to the TOP layer, and power layer adjacent to the BOTTOM in a 4-layer card.. just because bottom layer is most of the times used by passive components and most of the active logic sits on top layer (MOST CASES)- so, giving a split-free Ground plane reference to the Top layer, where most logic traces are routed would be a good idea...

 

[marce]

If the components take up too much room though the long traces will get routed on the bottom layer...

 

[malli_1729]

In your layout where 3.3V and 1.8V are going. whether they are going to whole PCB or only few sections. What is the Power consumption of both rails. What are the tolerances of these rails (2%,3%...etc).

If tolerance is large and Current consumption is small, then there may not be a requirement of a plane also. Simple 20mil to 50mil trace should be fine.

 

[hobbyckts]

In your layout where 3.3V and 1.8V are going. whether they are going to whole PCB or only few sections. What is the Power consumption of both rails. What are the tolerances of these rails (2%,3%...etc).

If tolerance is large and Current consumption is small, then there may not be a requirement of a plane also. Simple 20mil to 50mil trace should be fine.

If there is no separate power plane is required. Then what could be done at the scond layer?

 

[malli_1729]

there are multiple options...

let the owner specify the requirements....
owner should get the clarity...we are hear to help to solve problems......