Partially reconfiguration

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vaf20

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hi all
what's Partially synthesis and how and ??? i mean that part of the bitstream can be recongured affecting only a local part of the FPGA, while the rest of the FPGA can operate normally. . .
plz. u come on
tnx ahead
 

check www.reconf.org they are working on this using Xilinx Viertex-II pro and they developed a EDA program for this porpose,
more details about this at the XCELL journal "Managining Partial Dynamic reconfiguration in Virtex-II Pro FPGAs"
 

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