Partially reconfiguration

[vaf20]

hi all
what's Partially synthesis and how and ??? i mean that part of the bitstream can be recongured affecting only a local part of the FPGA, while the rest of the FPGA can operate normally. . .
plz. u come on
tnx ahead

 

[tut]

hi there,
u can go through the following document:
Two Flows for Partial Reconfiguration:
Module Based or Small Bit Manipulations @
**broken link removed**

:wink: GOOGLE can also help
http://www.google.co.in/search?hl=en&q=Partial+Reconfiguration&btnG=Google+Search&meta=


tut..

 

[bibo1978]

check www.reconf.org they are working on this using Xilinx Viertex-II pro and they developed a EDA program for this porpose,
more details about this at the XCELL journal "Managining Partial Dynamic reconfiguration in Virtex-II Pro FPGAs"