pad-via, via-via spacing

[buenos]

via to via spacing

hi

i have designed lots of PCBs, most of them for series production, but now in my new job, they told me that i have to use pad-via, via-via spacing constraints (0.2mm). pad-via because of soldering, but via-via? Previously I worked with Altium Designer (there is no category for these rules), now I have to work with Cadence Allegro (there are separate categories for these in Allegro).

so, how is it? someone says a PCB can not be manufactured/soldered without these constraints, someone else (other companies) say its not a problem? I worked together with 5 different soldering companies: small and big ones, and they never complained. Now we have our own production facility.

and what about the package-to-package spacing? In altium, their silkscreen were overlap always to make dense design (pads were 0.2mm away from each other at least). now they say there is a big place-court top rectangle, they can not overlap: these rectangles are much bigger than the components themselves.

???

are there some articles about the subject?

 

[senilicus]

via spacing

For via-via spacing there are two thing to consider. First of all you have to deal with the copper to copper clearance.
This can be very small ( even as small as 4 mils).

But more important, you have to deal with the hole to hole distance. You got to have a certain distance from hole wall to hole wall.
At our compagnie we use a hole to hole clearance of 24 mils minimum. But you have to talk to your board fabricator about their requirements on this. I can imagine that for bigger holes that clearance should be bigger also.


For component spacing, it is all defined by the assembling house that is doing the job. based on their machinery the will have requirements on this issue.

 

[cyberrat]

via to pad spacing

And for the closeness of the components, they use the placement outline areas perhaps because they have had problems in the past with soldering when they were closer, perhaps the placement machines etc are not as good?

If they are the companies rules then they are there for a good reason so best to stick to them.

I have all these design rules in Cadstar & they help to create a better design that will not cause problems manufacturing the PCB or assembling it nor in later life.

 

[FvM]

pad-via

I basically agree with senilicius. For through-plated drills, the close-holes parameter is the tightest constraint, particularly for high density design, where I'm used to 20 mils, minimum 18 mils for low voltage. Unfortunately, the parameter can't be specifies with all CAD tools as such, so you have to use a converted via-via or via-throughpad value instead. Final check should be performed with gerber tools anyway.

I don't see a particular relation of via spacing to soldering. Vias opened in solder mask, e. g. to be used as test points or for manufacturing reasons can have a smaller pad at the mask layer to increase the isolation distance to near by SMD pads.

I think it's generally helpful to define part frames in libraries that set the distance to adjacent parts. Minimum distances are often recommended from manufacturers together with pad dimensions. But as said, an increased spacing may be required by a an assembly house. For a compact design, it may be necessary to contact the service provider and negotiate smaller dimensions.

 

[buenos]

ipc via in pads

ok. thanx.
but what is the point in pad-via spacing? for my earlier designs it was 0, now it has to be 0.2mm.

 

[FvM]

via pads

You mean the same-net pad to via spacing? If the vias are tented, have closed solder mask, I don't see a particular reason. It may be desirable to have the same-net spacing not below standard copper-to-copper spacing for several reasons: to avoid unclean copper finish, to ease visual inspection of PCB and also for simple DFM check without considering netlists.

 

[buenos]

tent pcb via or not

same net pad to via.
example board: minimal clearance is 125um, also for same net. pad to via minimum spacing was 0.2mm. vias were tented on top. this are the spacing rules on all boiards of the company, i can not tchange them. probably few people here agreed in this 20 years ago, maybe none of them is still at the company...

they were talking about soldertin flowing into vias. anyway, soldertin flows into via holes, not into vias, so this clearance doesnt make too much sense, or does it?
why those companies (who i worked together with) never mentioned to me that they dont like my pad to via spacing?

 

[FvM]

tenting via holes

The tenting of vias is a special point regarding PCB manufacturer technology, I met a lot of different rules, e. g.:

-vias must not be tented at both sides, or the mask could be blown up during soldering
-vias must not be tented at one side only, or the mask may be delaminated in HAL (hot air leveling) process
-if tented at both sides, as minimm mask width beneath the vias must be kept to prevent liquids from entering the via during processing

These rules are partly contradictory among each other and also to other design rules. Obviously, they strongly depend on the used PCB technology. I take this as an example, that you can't define universal PCB design rules.

May be that your company has unreasonable design rules, but I think, you can get along with. If a project actually requires to revise the rules, it surely will be done.

 

[House_Cat]

making via tented software

...they were talking about soldertin flowing into vias. anyway, soldertin flows into via holes, not into vias, so this clearance doesnt make too much sense, or does it? why those companies (who i worked together with) never mentioned to me that they dont like my pad to via spacing?

You will work for many ignorant people over the course of your career. Many of them don't know why things are done - they just do them because someone told them to do it that way.

Solder won't flow into a via or pad hole like water, unless the hole is very large. The viscosity and surface tension of the solder will keep it on the surface. Capillary action and vacuum will DRAW the solder into a hole, but only if the hole is vented, only if the hole is large enough, and only if it is above the flow temperature of the solder. The two main problems with trying to use via-in-pad for BGA without filling the via are blowout from hot gas escaping from bottom tented vias, and sucking the ball down an untented via hole with capillary action. Both problems can be reduced to negligible by simply making the via hole smaller. Even the IPC recognizes this in the new IPC7351A specs. The same logic can be applied to via and pad holes for less critical placement. Therefore, your .2mm requirement is completely arbitrary on the part of your company unless they have combined it with a hole size requirement for vias and thru-hole pads.

Tenting a via doesn't cause chemicals to be trapped, nor will it cause mask failure. It also won't cause the thru-hole to fail prematurely. To prevent damage to the mask for boards that will be subjected to high temperature transients, you simply tent the copper and leave the hole open. It's easy to do in almost all EDA software. All of these rules are set down by people who never take the time to study the science behind what they are doing. They are content to design by "thumb rules". I often wonder in which orifice that thumb has been hiding.

 

[darla1]

untented via pcb

you can see this article

 

[cyberrat]

via to pad distance

However, if your talking about pad to via on the same net, there is a need to have a spacing between the pad and the via when it is an SMT device.

This is because the via will draw heat away from the pad quicker than a track will, so a .01" spacing is generally used between copper edges of both, irrespective of whether or not it is covered in solder resist.

Large companies organise the setting up of these rules so that they have as few problems with the boards as possible. If you have problems with specific rules then ask your peers there about them, why they are in place & the consequences of breaking them. Remember keeping your job may rely on you following agreed company procedures whether you agree with them or not. The rules will not usually prevent a board from being made but may make it larger than it could be, this is where you need to negotiate on the implementation of such rules and at that point get agreement that you can break them for that project alone.