P substrate has electrons?

[fateme m]

A P type semiconductor has only free holes and an N type has only free electrons. So in an NMOS, from where do the electrons in a lightly dope P substrate come to the gate and form an inversion layer?! /isn't a P substrate supposed to have only holes??

 

[dick_freebird]

They come from (drum roll...) the Source terminal.

What a bulk chunk of P substrate does all alone has
not much to do with a MOS, or a PN diode, structure.
Injecting minority carriers or inverting a region by an
applied field changes lots of things.

 

[c_mitra]

A P type semiconductor has only free holes and an N type has only free electrons. So in an NMOS, from where do the electrons in a lightly dope P substrate come to the gate and form an inversion layer?! /isn't a P substrate supposed to have only holes??

There are majority carriers and there are minority carriers. We sometimes ignore the minority carriers but that does not mean they simply go away. They are always there.

 

[srizbf]

P substrate have holes. yes. that is due to doping.
But there are electron/hole pairs available due to thermal effect.
So these thermally generated holes are the initiators in your case.

 

[timof]

As dick_freebird wrote, electrons in the inversion layer of a NMOS transistor are coming from source (and drain - depending on applied voltages) - if there are n+ source/drain regions abutting the gate.

In NMOS capacitor without n+ regions nearby, what happens when gate is biased positively is this - at first, holes are pulled away from the gate, a deep depletion region is formed under the gate, and thermal generation process in the depletion region generates electrons and holes. Holes are extracted by the built-in filed of the depletion region into the quasi-neutral substrate / well, while electrons are pulled to the gate and form an inversion layer. This process may be very slow (of the order of seconds or more) - if silicon is pure and if temperature is low (say -25C).

Max
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