overdrive voltage for CMOS

[rampat]

overdrive voltage cmos

How to calculate the worst case overdrive voltage(Vov) across corners for MOS in CMOS technology.And also since the bias voltage varies,how to take care of this variation while considering the overdrive..

 

[Sadegh.j]

cmos over drive voltage

I think the best thing to do is to ask the simulator to calculate it for you. use Hspice

 

[rampat]

overdrive voltage in cmos

Does it mean that we to consider always worst case values for the design?

 

[analog_prodigy]

mos overdrive voltage vdsat

it's designer's job to assume the overdrive voltages. and see in the output listing file about the min required vdsat so that u can check whether u r in the safe region.
always consider 0.2-0.4V above the threshold voltage which keeps ur transistor in saturation.
Leave all the junk work & necessary chore to simulator as Sadegh suggested. Analyse the results and change the values if necessary.
Consider values just above the worst case values

 

[docini]

since overdrive voltage is directly proportional to current, the worst case corner for vdsat depends on the biasing current which biases that particular transistor. since VTH is maximum at slow process corner, vdsat is minimumfor a given current. see where the bias current gives min current at max or min operating temperature depending on whether bias circuit is a PTAT or NTAT or bandgap current. based on above, we can guess at which corner, vdsat will be min or max.
we have tobe careful where vdsat is max since we have tocheck whether all transistors are in saturation only at this corner.