Output power and S22

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praveen450

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Hi,
I'm designing matching circuit for Power amplifier. My S22 without matching circuit is -1.5dB and output power is 16dBm. When I use matching circuit my S22 is about -9dB but my output power is 15.2dB.

My question is

Is it what I need to expect or do the output power should increase when S22 is -9dB?.

If the output power may not increase, then why should I match the output to 50 ohms (I know to reduce reflections but I'm having more power at antenna in without matching case)
 

No this is not a good result, if not matching with resistors. My rule of thumb, is that each 0402 component cost 0.1-0.2 dB. If matching improvement is less then this, can its value be discussed.
Are you sure that impedance is correct measured?
Not using too extreme component values?
 

I'm sorry. output power is 15.2dBm (not 15.2dB) when matching is included.

Is it still wrong?

What's 0402 component? Can you please give more details?
 

I guessed it was dBm. Without knowing type of circuit or frequency range.. I had expected 20-21 dBm output level after matching.
0402 is a common size of body of SMD components.
 

I used S parameters for impedance measurements in the cadence tools.

The S parameters are attached for your reference. Please let me know about the changes I needed to do.
 

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  • SparaWOM.png
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  • SparaOM.png
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Can you send S11 of the unmatched TX circuit as a Touchstone file?
What is the frequency range it should be matched for?
 


You should do Power Matching instead conjugate matching.Even the power level which you intend to increase is low, sometimes S22 conjugate matching may not work or it works not as much as expected and improvement may be pretty negligible as same as in your case.Power matching will-perhaps-improve your S22 too but the main goal is here to improve the power level instead of a good S22.
Power matching is also quite easy.Find the Optimum Load Impedance by using Load Tuner in Cadence and match the output regarding to it.
 

Please see the touchstone file attached.

- - - Updated - - -

So, When do we prefer matching over power level?
 

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  • touchstone.tgz
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In a simulator can you easily do both types of matching as it is relative easy. For an amplifier with full output amplitude can power matching result in 1-2 dB higher level compared to matching based on low level internal impedance. Especially for amplifiers working in class F can also harmonic matching be of value for highest output level as well as for best PA efficiency and low harmonic levels. Can not see anything catastrophic with your impedance files, from wherever they origin. Why correction of a relative big mismatch, independent matching method, then not result in an improved output level, do I assume must be due something else.
 
Hi praveen450,

you'll do load pull simulations for power matching when it mostly comes to power amplifiers as we deal with large signal. i would assume you did a conjugate match for S22 and thus your results shown. As what E Kafeman mentioned, a load pull matching can increase your o/p power by 1-2dB

Best Regards,
Aaron
 

Hi Guys,

I'm also having such sort of issue unfortunately based on the loadpull measurements of 10W Ldmos transistor, I've designed the matching network in ADS. i'm getting the expected performance regarding PAE and RF output power. but in this case S22 is merely -2dB. I'm not sure how this output mismatch will impact on the performance of the functional PA when manufactured? any suggestions please??
 


Simulate some scenarios of s22 to take process variation into account. But don't forget, you're designing a PA, don't invest too much time on small-signal parameters!
 
Hi JonJoe and FVM,

thanks for your replies, i've decided to go ahead with poor S22 but certainly the PAE and RF output is great. in fact i'm working on two projects; one of them is microwave heating application using PA, in that the S22 is is going positive i-e +2dB which is very high but PAE and RF output is great, again please advise me if I should manufacture the board in this case?
 

If you have positive value of s22, it's POSSIBLE that you're faced with pa oscillation. You should fix it and not manufacture the board!
 

Hi JohnJoe,

yes you were right! that was stability issue and I've fixed it. now the last step. I've generated the layout and going to run cosimulation, but in this case when i do the DC-Annotation i find the current at output terminal is in pA while at this gate voltage it should give nearly 100mA, so at the output port i'm getting only 20% PAE and 5W output power? any advice in this case please??
 

Yes, post a pic of your schematic with dc annotation :smile:
 

You did EM simulation Microwave mode in ADS, that's why DC (0Hz) is not in solution dataset.Microwave mode has a low frequency limit ( few tenth kHz ) and DC currents will not flow.
If you do this simulation in RF mode and if you start your min. frequency from DC, they will flow.
 

Hi There,

I'm going to measure the performance of PA, any suggestions/precautions or any thought by which I may get improved performance. because I've observed that the capacitors and other passive elements are playing a very dramatic role in the performance of PA in simulations, not sure how they are gonna do in measurement process? thanks in advance!!
 

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