Orcad PCB designer: Two sided PCB query

I am new to orcad pcb editor. I am designing a circuit on a single layer substrate, i.e top copper/substrate/bottom copper. I want to place the components and most of the routing lines on the top layer but few routing lines will be in the bottom layer. The rest of the bottom layer will act as ground plane. The unused top layer will be filled with copper pour which will be connected to the bottom ground by stitch vias. My question is that if some component requires ground connection in the top layer e.g a bypass capacitor how can i give the gnd?....since my circuit will work at high frequencies grounding will be important. i can make a fanout to connect it with the bottom ground but that will be using only one via(which may fail).

IS it possible to connect the gnd pad of the bypass capacitor to the top copper pour (which will contain many stitch vias) to ensure proper grounding. please explain me the steps for doing so in pcb editor. i guess nothing extra has to be done in the schematic in capture.

You are not limited to use only one via for each bypass capacitors to be connected to the ground. I suggest to place two vias right next to the left and right hand side of your bypass capacitor as close as possible (which would not fail your assembly process).

What I've come across we usually create a small island next to the bypass capacitor to create low impedance ground path and stitch it to the bottom layer ground plane. I think this shouldn't be a problem for bypassing purpose.

nelsonys said:

You are not limited to use only one via for each bypass capacitors to be connected to the ground. I suggest to place two vias right next to the left and right hand side of your bypass capacitor as close as possible (which would not fail your assembly process).

What I've come across we usually create a small island next to the bypass capacitor to create low impedance ground path and stitch it to the bottom layer ground plane. I think this shouldn't be a problem for bypassing purpose.

Click to expand...

Thank you nelsonys...i just want what you have mentioned...but i am new to pcb editor and dont know how to create island planes avoiding drc errors. can thermal relief be placed on the island planes? if possible plz provide some link or example on this...

You are using Cadence Orcad right... I never use this before... but it should be working almost the same like other CAD I guess...
If possible, please refer to the help provided by the developer.

I try my best to share some rough ideas on using this CAD.
I guess you already knew how to import nets and components into PCB environment from schematic using forward annotation right?
With nets available, then only you can apply DRC appropriately.

Drawing patterns falls into two main categories: Routing lines and creating polygons (some called pour, fill, etc).
For Altium, the net name itself is self-explanatory, in other sense you can briefly tell how the net is connected between which components.
Next thing to be noted is, how are you going to define your DRC in terms of clearance required. You can set your own clearance according to your design and voltage.

First you just have to click the polygon pour button then draft the outline as you wish, then select the relevant net for it.
Beforehand, you should set your DRC check as ON status so that it can generate required clearance automatically.
You can work under DRC off too to allow manual modification later on.

Thermal relief is part of the parameters under polygon, you can set your own thermal relief's pad size and clearance accordingly.

Please refer to this Orcad PCB help: **broken link removed**
Refer to C.8 Pours or fills.
I guess this what you want here.

Enjoy the fun of PCB design~!

I agree to Nelson... Also, I think the Orcad PCB editor calls it with the name of "Obstacles" if I'm correct. You can define any shape and then place your stitching vias to ground. It should take thermal relief by itself if you define obstacle with the name of your ground plane.

Also, there is a "padstack" menu item. You can define different via sizes there and then you need to spedifically choose which via size you would like to use during design.

-kjs