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I'm trying to purchase a verilog HDL simulation tool either VCS or ModelSim SE. Does anyone know pro and con for both? Also, you do any recommended tool?
I'm running Win XP. As you might know, the price of VCS is about 60K and Modelsim is about 20K. Is the gate level simulation significantly faster to justify the money value?
Many think that VCS is usually for ASIC and ModelSim is usually for FPGA. I know I am asking a question that is similar to "PC or Mac".
VCS is better.. hense the price tag.. but modelsim will do quite a bit too.. I wouldn't say that modelsim is for FPGA..
I guess the biggest factor would be how big the design is your trying to make.. If its huge I would go VCS. But if its not overly large Modelsim will cut it.
If you're doing FPGA work I'd suggest Modelsim. If you're doing ASIC design or IP targeted at SOC's many of your customers will be using the Cadence or Synplicity simulators, and will expect your scripts to support them.
Modelsim is a perfectly good simulator and is certainly cheaper to own - maintanence is a reasonable percentage of the purchase cost.
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